From: Brian Masney <bmasney@redhat.com>
To: Joakim Zhang <joakim.zhang@cixtech.com>
Cc: "mturquette@baylibre.com" <mturquette@baylibre.com>,
"sboyd@kernel.org" <sboyd@kernel.org>,
"robh@kernel.org" <robh@kernel.org>,
"krzk+dt@kernel.org" <krzk+dt@kernel.org>,
"conor+dt@kernel.org" <conor+dt@kernel.org>,
"p.zabel@pengutronix.de" <p.zabel@pengutronix.de>,
cix-kernel-upstream <cix-kernel-upstream@cixtech.com>,
"linux-clk@vger.kernel.org" <linux-clk@vger.kernel.org>,
"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
"linux-arm-kernel@lists.infradead.org"
<linux-arm-kernel@lists.infradead.org>
Subject: Re: [PATCH v10 2/4] clk: cix: add sky1 audss clock controller
Date: Wed, 22 Jul 2026 08:23:13 -0400 [thread overview]
Message-ID: <amC2MY4QaCfCBdm-@redhat.com> (raw)
In-Reply-To: <SEYPR06MB6226C74C33B3EE124E3E0F2C82C12@SEYPR06MB6226.apcprd06.prod.outlook.com>
Hi Joakim,
On Wed, Jul 22, 2026 at 01:45:52AM +0000, Joakim Zhang wrote:
> > > +static void sky1_audss_clk_gate_disable(struct clk_hw *hw) {
> > > + sky1_audss_clk_gate_endisable(hw, 0);
> >
> > pm_runtime_put ?
>
> No. Runtime PM is handled by CCF: rpm_enabled is set when the provider has PM enabled before registration, and clk_prepare() (as well as set_rate/set_parent) already calls pm_runtime_resume_and_get() on the provider. That runs our runtime_resume before clk ops touch the CRU, so extra get/put in the clk_ops would be redundant. Doing get/put in .enable/.disable would also be wrong because those callbacks can run in atomic context and must not sleep.
OK yes I forgot about that. Yes, I see it now and agree it's not needed
in the driver.
I think do the two other minor cleanups I mentioned and I think this driver
is good, at least from my vantage point.
Brian
next prev parent reply other threads:[~2026-07-22 12:23 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-07-20 5:15 [PATCH v10 0/4] Add Cix Sky1 AUDSS clock and reset support joakim.zhang
2026-07-20 5:15 ` [PATCH v10 1/4] dt-bindings: soc: cix: add sky1 audss cru controller joakim.zhang
2026-07-20 5:15 ` [PATCH v10 2/4] clk: cix: add sky1 audss clock controller joakim.zhang
2026-07-21 22:13 ` Brian Masney
2026-07-22 1:45 ` Joakim Zhang
2026-07-22 12:23 ` Brian Masney [this message]
2026-07-20 5:15 ` [PATCH v10 3/4] reset: cix: add sky1 audss auxiliary reset driver joakim.zhang
2026-07-20 7:20 ` Philipp Zabel
2026-07-20 12:17 ` Joakim Zhang
2026-07-20 5:15 ` [PATCH v10 4/4] arm64: dts: cix: sky1: add audss cru joakim.zhang
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