From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 6D9DD432E94 for ; Thu, 30 Jul 2026 14:57:11 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1785423433; cv=none; b=Rt6Z5BroOejwmMX+vubjJXXgM6rygzUUYZggrQ++txYKhmSwzE/f53FO/SCR9BwqUaDm1WPKjpCB6qfGBi698/tX0SedVq0TlwDJa9SMb2GufAkDJbhnq8N03OSw1Z154bpBJ3FN9qWdpuSeT/wEUr72YFd3KS3hhgTGJIGMTr8= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1785423433; c=relaxed/simple; bh=wAvUOvbly6R0Fe4ixQqEmttg+coA+1m2obaRZ+esQdI=; h=Date:From:To:Cc:Subject:Message-ID:References:MIME-Version: Content-Type:Content-Disposition:In-Reply-To; b=DjjoS2qQGX41h/qoJ8qiFAGzx9Y4iXY1Ix1PIRghnQP2jk/w1fo1rmWSh43ClzQlkjx49N05zLq3q3gnZzBDmQNrIOGpWg8NBMxRTWJl1kb4EmNIBXinWKUrGXMNPgOs6NxqKrp/usxQv9ovkgfxZgNI7Sds2OhTV4WG/j/A9K8= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com; spf=pass smtp.mailfrom=arm.com; dkim=pass (1024-bit key) header.d=arm.com header.i=@arm.com header.b=S3PDphwT; arc=none smtp.client-ip=217.140.110.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=arm.com header.i=@arm.com header.b="S3PDphwT" Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id B36802103 for ; Thu, 30 Jul 2026 07:57:06 -0700 (PDT) Received: from [10.2.11.34] (usa-sjc-imap-foss1.foss.arm.com [10.121.207.14]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 8BEB03F66F for ; Thu, 30 Jul 2026 07:57:10 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=arm.com; s=foss; t=1785423430; bh=wAvUOvbly6R0Fe4ixQqEmttg+coA+1m2obaRZ+esQdI=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=S3PDphwTNIy/kkd+7wh+o4IsxlRIsIZowrq2VWnGXQMgi5I5a8h0gfxItsB6kiDOd iCXy/EPasD9jPBSGK63Tzgk26XhNJxHgqmxUw2lPQYhPlC0Qzf6dX74t8C/3XsYFfM S3J37qb7vEYhzvTL68Yqs1pt3vgpPmxCk7SGbZFw= Date: Thu, 30 Jul 2026 15:56:43 +0100 From: Liviu Dudau To: Nicolas Frattaroli Cc: Ingo Molnar , Peter Zijlstra , Juri Lelli , Vincent Guittot , Dietmar Eggemann , Steven Rostedt , Ben Segall , Mel Gorman , Valentin Schneider , K Prateek Nayak , Boris Brezillon , Steven Price , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter , Grant Likely , Heiko Stuebner , linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, kernel@collabora.com Subject: Re: [PATCH v2 2/3] drm/panthor: Revisit reqs_lock handling in flush/reset paths Message-ID: References: <20260730-panthor-cache-flush-fix-v2-0-28790478bfff@collabora.com> <20260730-panthor-cache-flush-fix-v2-2-28790478bfff@collabora.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <20260730-panthor-cache-flush-fix-v2-2-28790478bfff@collabora.com> On Thu, Jul 30, 2026 at 01:45:15PM +0200, Nicolas Frattaroli wrote: > panthor_gpu_flush_caches() and panthor_gpu_soft_reset() would read (and > even reset) the contents of the pending_reqs register outside of holding > the reqs_lock. Additionally, when it did hold the lock, it did so with > the irqsave/irqrestore variants, even though the spinlock was never > acquired in an atomic context, just the threaded handler. > > Use the new wait_event_lock_timeout() macro to check pending_reqs under > the lock, and only do so without disabling interrupts. > > Fixes: 5cd894e258c4 ("drm/panthor: Add the GPU logical block") > Signed-off-by: Nicolas Frattaroli Reviewed-by: Liviu Dudau Best regards, Liviu > --- > drivers/gpu/drm/panthor/panthor_gpu.c | 25 +++++++++++-------------- > 1 file changed, 11 insertions(+), 14 deletions(-) > > diff --git a/drivers/gpu/drm/panthor/panthor_gpu.c b/drivers/gpu/drm/panthor/panthor_gpu.c > index c013d6bf9a59..f015bde80abf 100644 > --- a/drivers/gpu/drm/panthor/panthor_gpu.c > +++ b/drivers/gpu/drm/panthor/panthor_gpu.c > @@ -330,35 +330,34 @@ int panthor_gpu_flush_caches(struct panthor_device *ptdev, > u32 l2, u32 lsc, u32 other) > { > struct panthor_gpu *gpu = ptdev->gpu; > - unsigned long flags; > int ret = 0; > > /* Serialize cache flush operations. */ > guard(mutex)(&ptdev->gpu->cache_flush_lock); > > - spin_lock_irqsave(&ptdev->gpu->reqs_lock, flags); > + spin_lock(&ptdev->gpu->reqs_lock); > if (!(ptdev->gpu->pending_reqs & GPU_IRQ_CLEAN_CACHES_COMPLETED)) { > ptdev->gpu->pending_reqs |= GPU_IRQ_CLEAN_CACHES_COMPLETED; > gpu_write(gpu->iomem, GPU_CMD, GPU_FLUSH_CACHES(l2, lsc, other)); > } else { > ret = -EIO; > } > - spin_unlock_irqrestore(&ptdev->gpu->reqs_lock, flags); > > - if (ret) > + if (ret) { > + spin_unlock(&ptdev->gpu->reqs_lock); > return ret; > + } > > - if (!wait_event_timeout(ptdev->gpu->reqs_acked, > + if (!wait_event_lock_timeout(ptdev->gpu->reqs_acked, > !(ptdev->gpu->pending_reqs & GPU_IRQ_CLEAN_CACHES_COMPLETED), > - msecs_to_jiffies(100))) { > - spin_lock_irqsave(&ptdev->gpu->reqs_lock, flags); > + ptdev->gpu->reqs_lock, msecs_to_jiffies(100))) { > if ((ptdev->gpu->pending_reqs & GPU_IRQ_CLEAN_CACHES_COMPLETED) != 0 && > !(gpu_read(gpu->irq.iomem, INT_RAWSTAT) & GPU_IRQ_CLEAN_CACHES_COMPLETED)) > ret = -ETIMEDOUT; > else > ptdev->gpu->pending_reqs &= ~GPU_IRQ_CLEAN_CACHES_COMPLETED; > - spin_unlock_irqrestore(&ptdev->gpu->reqs_lock, flags); > } > + spin_unlock(&ptdev->gpu->reqs_lock); > > if (ret) { > panthor_device_schedule_reset(ptdev); > @@ -378,27 +377,25 @@ int panthor_gpu_soft_reset(struct panthor_device *ptdev) > { > struct panthor_gpu *gpu = ptdev->gpu; > bool timedout = false; > - unsigned long flags; > > - spin_lock_irqsave(&ptdev->gpu->reqs_lock, flags); > + guard(spinlock)(&ptdev->gpu->reqs_lock); > + > if (!drm_WARN_ON(&ptdev->base, > ptdev->gpu->pending_reqs & GPU_IRQ_RESET_COMPLETED)) { > ptdev->gpu->pending_reqs |= GPU_IRQ_RESET_COMPLETED; > gpu_write(gpu->irq.iomem, INT_CLEAR, GPU_IRQ_RESET_COMPLETED); > gpu_write(gpu->iomem, GPU_CMD, GPU_SOFT_RESET); > } > - spin_unlock_irqrestore(&ptdev->gpu->reqs_lock, flags); > > - if (!wait_event_timeout(ptdev->gpu->reqs_acked, > + if (!wait_event_lock_timeout(ptdev->gpu->reqs_acked, > !(ptdev->gpu->pending_reqs & GPU_IRQ_RESET_COMPLETED), > + ptdev->gpu->reqs_lock, > msecs_to_jiffies(100))) { > - spin_lock_irqsave(&ptdev->gpu->reqs_lock, flags); > if ((ptdev->gpu->pending_reqs & GPU_IRQ_RESET_COMPLETED) != 0 && > !(gpu_read(gpu->irq.iomem, INT_RAWSTAT) & GPU_IRQ_RESET_COMPLETED)) > timedout = true; > else > ptdev->gpu->pending_reqs &= ~GPU_IRQ_RESET_COMPLETED; > - spin_unlock_irqrestore(&ptdev->gpu->reqs_lock, flags); > } > > if (timedout) { > > -- > 2.55.0 > -- ==================== | I would like to | | fix the world, | | but they're not | | giving me the | \ source code! / --------------- ¯\_(ツ)_/¯