Re: [PATCH bpf-next v4 RESEND] m68k, bpf: Add initial BPF JIT compiler support

[Kuan-Wei Chiu <visitorckw@gmail.com>]

Hi Andreas,

On Wed, Jul 29, 2026 at 05:33:41PM +0200, Andreas Schwab wrote:
> On Jul 29 2026, Kuan-Wei Chiu wrote:
> 
> > +static void emit_alu32_k(const struct bpf_insn *insn, struct jit_ctx *ctx)
> > +{
> > +	const s8 *dst = bpf2m68k[insn->dst_reg];
> > +	const s8 *tmp1 = bpf2m68k[TMP_REG_1];
> > +	const s8 *tmp2 = bpf2m68k[TMP_REG_2];
> > +	s8 d_reg;
> > +
> > +	d_reg = bpf_get_reg32(dst[1], tmp1[1], ctx);
> > +
> > +	switch (BPF_OP(insn->code)) {
> > +	case BPF_MOV:
> > +		emit_16(ctx, 0x203c | (d_reg << 9));		/* move.l #imm, dst */
> > +		emit_32(ctx, insn->imm);
> > +		break;
> > +	case BPF_ADD:
> > +		emit_16(ctx, 0x0680 | d_reg);			/* addi.l #imm, dst */
> > +		emit_32(ctx, insn->imm);
> > +		break;
> > +	case BPF_SUB:
> > +		emit_16(ctx, 0x0480 | d_reg);			/* subi.l #imm, dst */
> > +		emit_32(ctx, insn->imm);
> > +		break;
> > +	case BPF_AND:
> > +		emit_16(ctx, 0x0280 | d_reg);			/* andi.l #imm, dst */
> > +		emit_32(ctx, insn->imm);
> > +		break;
> > +	case BPF_OR:
> > +		emit_16(ctx, 0x0080 | d_reg);			/* ori.l #imm, dst */
> > +		emit_32(ctx, insn->imm);
> > +		break;
> > +	case BPF_XOR:
> > +		emit_16(ctx, 0x0a80 | d_reg);			/* eori.l #imm, dst */
> > +		emit_32(ctx, insn->imm);
> > +		break;
> > +	case BPF_LSH:
> > +	case BPF_RSH:
> > +	case BPF_ARSH:
> > +		emit_16(ctx, 0x203c | (tmp2[1] << 9));		/* move.l #imm, count */
> > +		emit_32(ctx, insn->imm & 0x1f);
> 
> That can be moveq.  Also, for the other cases, if imm is in the range of
> moveq it is worthwhile to load it into a temporary register.
> 
Thanks for the suggestions.
I will include these optimizations in v5.

Regards,
Kuan-Wei