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From: "Luck, Tony" <tony.luck@intel.com>
To: "Chen, Yu C" <yu.c.chen@intel.com>
Cc: Reinette Chatre <reinette.chatre@intel.com>, <tglx@kernel.org>,
	<bp@alien8.de>, <mingo@redhat.com>, <dave.hansen@linux.intel.com>,
	<hpa@zytor.com>, <fenghuay@nvidia.com>, <babu.moger@amd.com>,
	<chen.yu@linux.dev>, <x86@kernel.org>,
	<linux-kernel@vger.kernel.org>
Subject: Re: [PATCH v6 5/9] x86/resctrl: Parse ACPI CMRC table
Date: Tue, 25 Aug 2026 09:38:30 -0700	[thread overview]
Message-ID: <ao3FBjmmBbWTEw2d@agluck-desk3> (raw)
In-Reply-To: <4314ce95-baa9-43cd-ad1c-4e56c07b9556@intel.com>

On Wed, Aug 26, 2026 at 12:11:49AM +0800, Chen, Yu C wrote:
> Hi Reinette,
> 
> On 8/25/2026 11:39 PM, Reinette Chatre wrote:
> > Hi Chenyu,
> > 
> > On 8/25/26 2:19 AM, Chen, Yu C wrote:
> > > On 8/20/2026 7:06 AM, Reinette Chatre wrote:
> > > > On 7/25/26 2:23 AM, Chen Yu wrote:
> > > > Actually, looks like the original
> > > > MSR based scale obtained via CPUID.(EAX=0FH,ECX=1H) is 32 bits while this new scale value
> > > > from CMRC is 64 bits. The existing code can thus not accommodate the new values and need to
> > > > be updated?
> > > > 
> > > 
> > > Yes, the legacy CPUID reports it as 32 bits, while CMRC is declared as 64 bits.
> > > 
> > > In theory, we should change the scale type from unsigned int to u64 to accommodate
> > > both the legacy CPUID and CMRC. However, it seems unlikely that the scale would
> > > exceed 32 bits. If the scale were 32 bits, the L3 occupancy would be at least
> > > 2^32 − 1, which is about 4 GB. We have not yet seen platform with 4 GB of L3 cache.
> > > So perhaps we can keep erdt_scale as unsigned int for now IMO.
> > 
> > 
> > It sounds like you are saying that the spec you are enabling should not be using 64 bits for
> > this value. It is unexpected to me that work on enabling of a spec adds such constraint without
> > clear motivation. If you find that the spec is not correct then I think it would be better to have
> > it changed there instead of building what appears to be unsupported assumptions into resctrl.
> > 
> 
> OK, let me check with the team.

Looking at the RDT architecture spec that defines the CMRC table it
looks to me like the "CMT Counter Upscaling Factor" was made 8-bytes
just to round the table out to a whole number or quad-words.

This value represents the granularity of cache occupancy reporting.
The feature would be worthless if this was >=4GB no matter how large
the LLC cache may be in future generations.

If large values are a big concern then perhaps include a sanity check
in the code:

	if (cmrc->upscale >= SZ_4G)
		pr_warn(FW_BUG "insane CMRC upscale value 0x%llx\n", cmrc->upscale);
> 
> thanks,
> Chenyu

-Tony

  reply	other threads:[~2026-08-25 16:38 UTC|newest]

Thread overview: 50+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-07-25  9:20 [PATCH v6 0/9] Introduce MMIO-based CMT access for Enhanced RDT Chen Yu
2026-07-25  9:22 ` [PATCH v6 1/9] x86/topology: Export topo_lookup_cpuid() for resctrl use Chen Yu
2026-08-19 22:55   ` Reinette Chatre
2026-08-22  4:16     ` Chen Yu
2026-07-25  9:22 ` [PATCH v6 2/9] x86/resctrl: Require 64-bit x86 for resctrl support Chen Yu
2026-08-19 22:55   ` Reinette Chatre
2026-08-20 15:20     ` Luck, Tony
2026-08-20 15:54       ` Reinette Chatre
2026-08-20 17:01         ` Luck, Tony
2026-08-20 17:12           ` Dave Hansen
2026-08-20 17:48             ` Reinette Chatre
2026-08-21  2:37               ` Borislav Petkov
2026-08-21 15:47                 ` Reinette Chatre
2026-08-21 15:54                   ` Borislav Petkov
2026-08-25 13:12                   ` Chen Yu
2026-08-24 14:18                     ` Dave Hansen
2026-08-24 15:15                       ` Chen, Yu C
2026-08-25  2:40                       ` Borislav Petkov
2026-08-21 11:28             ` Peter Zijlstra
2026-08-21 15:52               ` Borislav Petkov
2026-08-21 16:58                 ` Luck, Tony
2026-08-22  0:04                   ` Borislav Petkov
2026-07-25  9:22 ` [PATCH v6 3/9] x86/resctrl: Parse ACPI ERDT table and save CACD cpumask for RMDD domains Chen Yu
2026-08-19 23:01   ` Reinette Chatre
2026-08-25  8:06     ` Chen Yu
2026-08-24 15:54       ` Reinette Chatre
2026-08-25 16:18         ` Chen, Yu C
2026-07-25  9:23 ` [PATCH v6 4/9] x86/resctrl: Attach ACPI ERDT information to L3 mon domain on CPU online Chen Yu
2026-08-19 23:04   ` Reinette Chatre
2026-08-25  5:54     ` Chen, Yu C
2026-07-25  9:23 ` [PATCH v6 5/9] x86/resctrl: Parse ACPI CMRC table Chen Yu
2026-08-19 23:06   ` Reinette Chatre
2026-08-25  9:19     ` Chen, Yu C
2026-08-25 15:39       ` Reinette Chatre
2026-08-25 16:11         ` Chen, Yu C
2026-08-25 16:38           ` Luck, Tony [this message]
2026-07-25  9:23 ` [PATCH v6 6/9] x86/resctrl: Refactor the monitor read function Chen Yu
2026-08-19 23:07   ` Reinette Chatre
2026-08-25 10:03     ` Chen, Yu C
2026-07-25  9:23 ` [PATCH v6 7/9] fs/resctrl: Do not invoke smp_processor_id() in preemptible context Chen Yu
2026-08-19 23:08   ` Reinette Chatre
2026-08-25 11:17     ` Chen, Yu C
2026-07-25  9:23 ` [PATCH v6 8/9] x86/resctrl: Introduce erdt_cpu_has() and erdt_support() Chen Yu
2026-08-19 23:08   ` Reinette Chatre
2026-08-25 11:55     ` Chen, Yu C
2026-07-25  9:23 ` [PATCH v6 9/9] x86/resctrl: Add MMIO-based LLC occupancy monitoring support Chen Yu
2026-08-19 23:10   ` Reinette Chatre
2026-08-25 16:11     ` Chen, Yu C
2026-08-25 17:10       ` Reinette Chatre
2026-08-13  6:43 ` [PATCH v6 0/9] Introduce MMIO-based CMT access for Enhanced RDT Chen Yu

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