From: Catalin Marinas <catalin.marinas@arm.com>
To: Fuad Tabba <fuad.tabba@linux.dev>
Cc: Will Deacon <will@kernel.org>,
linux-arm-kernel@lists.infradead.org,
Marc Zyngier <maz@kernel.org>, Oliver Upton <oupton@kernel.org>,
Mark Rutland <mark.rutland@arm.com>,
Suzuki K Poulose <suzuki.poulose@arm.com>,
Mark Brown <broonie@kernel.org>,
kvmarm@lists.linux.dev, linux-kernel@vger.kernel.org
Subject: Re: [PATCH v3] arm64: Don't read GMID_EL1 when MTE is disabled
Date: Wed, 26 Aug 2026 12:06:26 +0100 [thread overview]
Message-ID: <ao7Isu9sxUEeECOZ@arm.com> (raw)
In-Reply-To: <CA+EHjTx93ERXZV1visdfBOGtH7wHff6TAoeJe+pNtikPrRp8Qw@mail.gmail.com>
On Tue, Aug 25, 2026 at 03:46:15PM +0100, Fuad Tabba wrote:
> On Tue, 25 Aug 2026 at 15:14, Will Deacon <will@kernel.org> wrote:
> ...
> > > > If you are worried about additional trapping of the MRS, we should go
> > > > for Will's improvement to always read the cached values in
> > > > __read_sysreg_by_encoding().
> > >
> > > Not worried :) __cpuinfo_store_cpu() has already read ID_AA64PFR1_EL1
> > > a few lines up.
> >
> > But if you go with __read_sysreg_by_encoding() then you'd still be
> > reading it (and trapping) twice, no?
>
> It would, and I'm fine with that on a CPU bring-up path.
For backports, yes. Going forward, I like Will's idea of reading the
cached value in __read_sysreg_by_encoding().
--
Catalin
prev parent reply other threads:[~2026-08-26 11:06 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-08-24 18:41 [PATCH v3] arm64: Don't read GMID_EL1 when MTE is disabled Fuad Tabba
2026-08-24 20:29 ` Catalin Marinas
2026-08-24 22:29 ` Fuad Tabba
2026-08-25 14:14 ` Will Deacon
2026-08-25 14:46 ` Fuad Tabba
2026-08-26 11:06 ` Catalin Marinas [this message]
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