From: Lukas Wunner <lukas@wunner.de>
To: peng.guo@montage-tech.com
Cc: linux-cxl@vger.kernel.org, linux-pci@vger.kernel.org,
linux-kernel@vger.kernel.org, bhelgaas@google.com,
dave@stgolabs.net, jic23@kernel.org, dave.jiang@intel.com,
alison.schofield@intel.com, vishal.l.verma@intel.com,
ira.weiny@intel.com, djbw@kernel.org, johnny.li@montage-tech.com,
jingzhong.yang@montage-tech.com, engguopeng@buaa.edu.cn
Subject: Re: [PATCH 2/2] cxl/core: Skip non-CXL capabilities in MCAP
Date: Sun, 16 Aug 2026 13:22:25 +0200 [thread overview]
Message-ID: <aoGdcWjzmvQAhFEK@wunner.de> (raw)
In-Reply-To: <20260816084957.3316727-3-peng.guo@montage-tech.com>
On Sun, Aug 16, 2026 at 04:49:57PM +0800, peng.guo@montage-tech.com wrote:
> +++ b/drivers/cxl/core/regs.c
> @@ -134,7 +134,13 @@ void cxl_probe_device_regs(struct device *dev, void __iomem *base,
> for (cap = 1; cap <= cap_count; cap++) {
> struct cxl_reg_map *rmap;
> u32 offset, length;
> - u16 cap_id;
> + u16 cap_id, vendor_id;
> +
Nit: Move the u16 line above the u32 line to maintain inverse Christmas
tree convention.
Thanks,
Lukas
prev parent reply other threads:[~2026-08-16 11:22 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-08-16 8:49 [PATCH 0/2] PCI/CXL: Distinguish CXL capabilities in MCAP peng.guo
2026-08-16 8:49 ` [PATCH 1/2] PCI: Add MMIO Capabilities Register Block definitions peng.guo
2026-08-16 11:19 ` Lukas Wunner
2026-08-16 8:49 ` [PATCH 2/2] cxl/core: Skip non-CXL capabilities in MCAP peng.guo
2026-08-16 11:22 ` Lukas Wunner [this message]
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