Re: [PATCH] PCI: quirks: Prevent D3 for Acer Swift SF515-51T Root Port to fix audio

[Lukas Wunner <lukas@wunner.de>]

On Tue, Aug 04, 2026 at 09:40:03PM +0200, Lowne Onema wrote:
>  3. Amending the power resource structures in drivers/acpi/: I looked
>    at this a bit more and noticed RP09 and the SATA port
>    (SAT0.PRT1) each have their own separate power resource in the
>    ACPI tables, but both end up controlling the same physical GPIO
>    pin. I'm not sure if that's something the kernel already knows
>    how to handle safely, or if trying to sync RP09's power to audio
>    activity could accidentally interfere with the SATA port through
>    that shared pin. Still learning this part of the kernel, so
>    wanted to ask before attempting it -- is that a real concern, or
>    is it fine, and a better approach?

If two devices reference the same PowerResource in the ACPI tables,
then the kernel is aware of the dependency.  E.g., when the
PowerResource is turned on, the kernel runtime resumes all "dependents"
of that PowerResource.

However if these are separate PowerResources whose _ON method happens
to toggle the same GPIO, that's opaque to the kernel.  I think it is
then the job of the _ON and _OFF methods to track whether another
device still needs the GPIO to be kept on.

But perhaps the ACPI tables are just completely broken and the right
thing to do is modify the PowerResource assignment such that all
3 devices depend on the same PowerResource?

> +++ b/drivers/pci/quirks.c
> +static void quirk_acer_sf515_rp09_no_d3(struct pci_dev *pdev)
> +{
> +     if (dmi_check_system(acer_sf515_rp_d3_dmi_table))
> +             pdev->dev_flags |= PCI_DEV_FLAGS_NO_D3;
> +}
> +DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x9db0,
> quirk_acer_sf515_rp09_no_d3);

On x86 SoCs introduced in the last about 10 years, keeping a Root Port
in D0 prevents the SoC from entering lower power states.  So the
workaround of keeping RP09 in D0 may reduce battery life.

Usually Root Ports can only be put into D3hot, not D3cold.  If there's
a PowerResource for the Root Port, that's usually for powering off
a device *below* that Root Port.  E.g. if RP09 is an internal,
unoccupied M.2 slot, then the PowerResource allows cutting power
to an NVMe drive or WiFi card in that M.2 slot.

If RP09 isn't exposed physically at all, then it's unclear why the OEM
chose to enable it in the first place, let alone describe a PowerResource
for it in the ACPI tables.

Thanks,

Lukas