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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: Mhi2A031hkMaEvqxyO2JZdsSxEt03fG6c36jTFoov9OQDK7vloeNi6YShNm6eJmIpu0X//SnieU/yAF9AXFXT3q6XHQtJBAWepvrIzReBbiVR4oGzQI0GWDgLjRgZwLbKuRV1un53vR06nlI1dut39UitsRKrGqQDcQLiN4cZyy1BFGZV9+9BNjm44c3Z22z596+FacUEG0t7NBvCxC7aWCFM5Sjqf+IeqM2wZISvTYXS/nQpMBupd0mhncePSo5qoHnqDCqtmT/6HJy5jXEuNBspC/oHLcDCQVQLYOJGW5hixalb/n8kFhV6HrnsMQMD6+wjjAAaKdPsT5/GKT4AV+El45RxVCZySkK7F1laEQDc0GMlzeh7CUjZVnWLFSBQwzGZaTlnQGJnqoZDsPDbWlj8eMynvsk5/C6NkaekcCsBpWpUXPDBkOBHDQV0iCy X-Exchange-RoutingPolicyChecked: hds8UM6+RRD2DIXVONsoIJQoWNmcy0180kz6DIn5Y00XDvTN7kg+EqvarpRUkRdbpx7EL04C8d87JsIorkrUmBlyIG+oMD/BskhA5cip5DeRcfad9wWVbA0oQjK4YYcRayMqZgHL9sg7cvk4QNNwAiCTpUahHU6Xm612Do7gb7EK5d8fJMjOFPOwxGEJH+ABMY2k4t4DBJLcDl+SlIa0Ut6R4/JHMlpA/gq73RoLaUKubz0IT71qQe8gnqAJ//OsP9FVwYkm3f4P3na2v39u2ogHm/2eor7+0ybZB/tjDk5G4daRsFcLGrnt2E4WvhTeYa7blGPzYY49/oubZJyELw== X-OriginatorOrg: opensource.cirrus.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 18 Aug 2026 08:16:21.1228 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 1dfb7a20-7faa-47f4-d0d3-08defd00fc9e X-MS-Exchange-CrossTenant-Id: bec09025-e5bc-40d1-a355-8e955c307de8 X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=bec09025-e5bc-40d1-a355-8e955c307de8;Ip=[84.19.233.75];Helo=[edirelay1.ad.cirrus.com] X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: TreatMessagesAsInternal-MN1PEPF0000F0DE.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: LV3PR19MB8779 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwODE4MDA2MCBTYWx0ZWRfX6bs0SuQrB57x ckHrXeH32QKMZgKbkXJBM+clQeZ+uwYk0u/7N/6mTTpTyMKQ5Prr0CtEdD0HjSTzerMJej0tH1j 3lY2BoIyp34JkfCBM6Gf4fsENDC/qZYb7pPfM6Wh0xFuyvrhZcpwTWdoaaN6Hqtmlc86ONRLxkp +DiyBthlMUN6l//ADw+2aUpefDFsew/kCZPPM/QJRwqTVPfkDBa+wPMl+JreA0W5lxvF++M6YrD JRy9iEYgGpdgEckeLWXM0ZQO+Uzv209kka+Yh2pCXbjw0VLCOf/9m3NMQr+fAklRlysKF2iyfTo QF07JrxoIlA/G8wOgUzAZ3UwKv7KPK+2ewvhQ7zOfQSNN0g7Yyu1dk9s1UavbCnEYSF6DUrCY15 jMZxfwjp9pg/9swWlgdTSSwk2pKpLzOTHGjBA830KvjhprPSiGcb/I4zrqz1sqVoTvZCVr1dJIz Hz1meB+BxuOlIysLItw== X-Proofpoint-GUID: nh9PBy539VXKpLtq8h7YcUkThfEZOULG X-Proofpoint-ORIG-GUID: nh9PBy539VXKpLtq8h7YcUkThfEZOULG X-Authority-Analysis: v=2.4 cv=FLMrAeos c=1 sm=1 tr=0 ts=6a8414db cx=c_pps a=5hlTapE2LkzBXMJ5nTapMw==:117 a=h1hSm8JtM9GN1ddwPAif2w==:17 a=6eWqkTHjU83fiwn7nKZWdM+Sl24=:19 a=z/mQ4Ysz8XfWz/Q5cLBRGdckG28=:19 a=kj9zAlcOel0A:10 a=Sv0fKeRqtYgA:10 a=s63m1ICgrNkA:10 a=RWc_ulEos4gA:10 a=VkNPw1HP01LnGYTKEx00:22 a=iX4cTi3TZMoOKdANLEfx:22 a=KfkQE9S9VqCBgivYGm0O:22 a=VwQbUJbxAAAA:8 a=pGLkceISAAAA:8 a=vBWSkdjjrtU5iRa61gkA:9 a=CjuIK1q_8ugA:10 X-Proofpoint-Spam-Info: AW1haW4tMjYwODE4MDA2MCBTYWx0ZWRfXwQoX3IQt6fui TMflQj+FJSI3FtVrFi6gpykgwLwnCjCuaAY39X6TsUitaI1LKgXoCHcGG6JnfU2Fwu4yi8ziRaC CIrYszMtluzX92uZnzmyzJDbDc5T/pw= X-Proofpoint-Spam-Reason: safe On Sat, Aug 15, 2026 at 02:45:00PM +0300, Andrey Golovko wrote: > On Fri, Aug 14, 2026 at 04:13:42PM +0100, Mark Brown wrote: > > > Does this work for multibyte reads? The regmap has val_size set to 8 > > but some of the read only registers are multibyte. For SoundWire > > val_bits doesn't really matter so you should just be able to set that to > > 32. > > It does not, thank you. Twenty of the Controls in the list are wider > than one byte, and with val_bits = 8 the MBQ layer refuses each of them > before anything reaches the bus, so the patch on its own would replace > an answer from the cache with -EINVAL. > > The widening is a patch of its own because the calibration write relied > on the old width, so I have sent both as v3 with it in front, against > for-7.3: > > https://lore.kernel.org/linux-sound/20260815112000.4180-1-andrey.golovko@gmail.com/ > > The cover letter has the list of the multi-byte Controls and what the > two patches were measured to do on the machine here. > > One thing I noticed while checking the sizes, unrelated to this series: > FU21 0x10 and UDMPU23 0x06 are in the read-only list but appear nowhere > in tas2783_sdca_mbq_size(), which returns 0 for them, so > tas2783_readable_register() refuses them and they are unreachable > through the regmap in either direction. Harmless as it stands, nothing > touches them, but the size callback looks incomplete rather than > deliberate. I can add them, or leave that to TI along with the rest of > the reg_defaults questions I owe them a mail about. One thing that is worth noting, is that sometimes in SDCA values are DisCo constants, these are registers where the value is just hard coded in the ACPI and typically not implemented in the hardware. Generally, these are implemented as non-read/non-write registers with an entry in the default array. This allows the constant value to be read through the regmap, and driver code generally doesn't need to care that the register is fictional. Both of the controls you list are latency which is commonly done as a DisCo constant, although that said it is also not a control that is AFAIK used by any implementation so could also just have been forgotten. Thanks, Charles