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[73.183.53.213]) by smtp.gmail.com with ESMTPSA id af79cd13be357-93749d9531fsm532494885a.24.2026.08.24.09.00.35 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 24 Aug 2026 09:00:36 -0700 (PDT) Date: Mon, 24 Aug 2026 12:00:34 -0400 From: Brian Masney To: hanzhijian Cc: Daniel Palmer , Romain Perier , Michael Turquette , Stephen Boyd , linux-arm-kernel@lists.infradead.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, stable@vger.kernel.org Subject: Re: [PATCH v2] clk: mstar: msc313-mpll: fix off-by-one in clock array allocation Message-ID: References: <67ec3261-9f3d-4dcc-b916-19dc8be56a6e@web.de> <20260824142800.3497263-1-hanzhijian1991@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20260824142800.3497263-1-hanzhijian1991@gmail.com> User-Agent: Mutt/2.4.0 (2026-06-19) On Mon, Aug 24, 2026 at 10:28:00PM +0800, hanzhijian wrote: > The hws array of mpll->clk_data is allocated with struct_size() using > ARRAY_SIZE(output_dividers) as the element count, giving it 7 elements. > But the probe function stores the MPLL clock at hws[0] and one > fixed-factor clock for each output divider at hws[i + 1] for i in > [0, ARRAY_SIZE(output_dividers)), writing 8 elements in total. The > final write to hws[7] is past the end of the allocation. > > clk_data->num is also set to NUMOUTPUTS (8), so the clock framework > reads hws[0..7], again accessing hws[7] out of bounds. > > Use NUMOUTPUTS as the element count so the allocation matches the > number of clocks actually stored and exposed. > > Found by smatch: > drivers/clk/mstar/clk-msc313-mpll.c:134 msc313_mpll_probe() > error: buffer overflow 'mpll->clk_data->hws' 7 <= 7 > > Fixes: bef7a78da716 ("clk: mstar: MStar/SigmaStar MPLL driver") > Cc: stable@vger.kernel.org > Signed-off-by: hanzhijian Reviewed-by: Brian Masney