The Linux Kernel Mailing List
 help / color / mirror / Atom feed
From: Sean Christopherson <seanjc@google.com>
To: Zide Chen <zide.chen@intel.com>
Cc: Dapeng Mi <dapeng1.mi@linux.intel.com>,
	Yosry Ahmed <yosry@kernel.org>,
	 Paolo Bonzini <pbonzini@redhat.com>,
	Peter Zijlstra <peterz@infradead.org>,
	kvm@vger.kernel.org,  Jim Mattson <jmattson@google.com>,
	Andi Kleen <ak@linux.intel.com>,
	 Stephane Eranian <eranian@google.com>,
	linux-kernel@vger.kernel.org,  Mingwei Zhang <mizhang@google.com>,
	Das Sandipan <Sandipan.Das@amd.com>,
	 Shukla Manali <Manali.Shukla@amd.com>,
	Xudong Hao <xudong.hao@intel.com>
Subject: Re: [PATCH v3 13/18] KVM: x86/pmu: Populate CPUID.0AH:ECX fixed-counter bitmap
Date: Thu, 12 Nov 2026 09:09:24 -0800	[thread overview]
Message-ID: <avXyxMgGzRBGbBN3@google.com> (raw)
In-Reply-To: <3d4804e9-3e5a-447e-8a54-8fa5d1c28f5b@intel.com>

On Wed, Nov 11, 2026, Zide Chen wrote:
> On 11/11/2026 9:37 AM, Sean Christopherson wrote:
> > On Tue, Nov 10, 2026, Zide Chen wrote:
> >>>>> KVM's principle of "not policing guest CPUID" means KVM allows userspace
> >>>>> to configure an arbitrary guest CPUID without rejecting the ioctl or
> >>>>> mutating the vCPUID entries.

...

> > Just because we *can* do something in KVM doesn't mean we *should* do that thing
> > in KVM.    
> 
> Got it.
> 
> >>>> - Features that actually need host hardware support need to be checked
> >>>> against both guest and host PMU capabilities.
> >>>>
> >>>> I'd propose something like this instead, leaving pmu->version unclamped:
> > 
> > Why?  What real world use case is there for KVM actively supporting a PMU version
> > "greater" than the underlying hardware?  E.g. emulating AnyThread deprecation is
> > (presumably) easy, emulating *all* of v5 on a v3 host, not so much...
> 
> Got it. I can think of a few discrepancies:
> 
> For example, the guest is supposed to handle Freeze_LBRs_On_PMI (legacy
> vs. streamlined) based on the guest PMU version. If KVM emulates the
> legacy behavior, but a v4+ guest expects the streamlined one, it may
> run into issues.

Well, yeah.  Because I'm saying KVM should *NOT* support running guests with a
"greater" vPMU version than is present in underlying hardware.  That's nothing
new; KVM rarely emulates features that don't exist in underlying hardare.

KVM doesn't generally enforce the virtual CPU model presented to the guest though,
because (a) userspace can do all of the same checks KVM can, e.g. by validating
its configuration against KVM_GET_SUPPORTED_CPUID, (b) adding that validation
in KVM would require a ton of code and create all kinds of ABI issues, and (c)
there are legitimate use cases for exposing a virtual CPU model that appears to
be insane/nonsensical.

  reply	other threads:[~2026-11-12 17:09 UTC|newest]

Thread overview: 65+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-11-06  1:39 [PATCH v3 00/18] KVM: x86/pmu: Add mediated vPMU PerfMon v5 support Zide Chen
2026-11-06  1:39 ` [PATCH v3 01/18] KVM: x86/pmu: Remove redundant Perf Global Status MSR bit definitions Zide Chen
2026-11-06 18:19   ` Yosry Ahmed
2026-11-06  1:39 ` [PATCH v3 02/18] KVM: x86/pmu: Rename all_valid_pmc_idx to pmc_exists Zide Chen
2026-11-06 18:21   ` Yosry Ahmed
2026-11-06  1:39 ` [PATCH v3 03/18] KVM: x86/pmu: Rename reserved_bits to eventsel_rsvd in kvm_pmu Zide Chen
2026-11-06 18:37   ` Yosry Ahmed
2026-11-06 21:16     ` Chen, Zide
2026-11-06 22:38       ` Yosry Ahmed
2026-11-06  1:39 ` [PATCH v3 04/18] KVM: x86/pmu: Add PMC bitmap accessor helpers Zide Chen
2026-11-06 19:09   ` Yosry Ahmed
2026-11-06 22:19     ` Chen, Zide
2026-11-06 22:35       ` Yosry Ahmed
2026-11-09  7:53         ` Mi, Dapeng
2026-11-09 17:56           ` Chen, Zide
2026-11-09 17:55         ` Chen, Zide
2026-11-09 18:07           ` Yosry Ahmed
2026-11-09 18:59             ` Chen, Zide
2026-11-09 21:12               ` Yosry Ahmed
2026-11-09 21:59                 ` Chen, Zide
2026-11-09 22:07                   ` Yosry Ahmed
2026-11-09 22:26                     ` Chen, Zide
2026-11-06  1:39 ` [PATCH v3 05/18] KVM: x86/pmu: Drop nr_arch_{gp,fixed}_counters from kvm_pmu Zide Chen
2026-11-06 19:34   ` Yosry Ahmed
2026-11-07  0:42     ` Jim Mattson
2026-11-07  2:26       ` Yosry Ahmed
2026-11-09 22:42       ` Chen, Zide
2026-11-09 22:47     ` Chen, Zide
2026-11-06  1:39 ` [PATCH v3 06/18] KVM: x86/pmu: Expose kvm_host_pmu to vendor modules Zide Chen
2026-11-06 19:37   ` Yosry Ahmed
2026-11-06  1:39 ` [PATCH v3 07/18] perf/x86: Plumb counter bitmap from x86_pmu to x86_pmu_cap Zide Chen
2026-11-06  1:39 ` [PATCH v3 08/18] KVM: x86/pmu: Switch to bitmask-based KVM PMU capabilities Zide Chen
2026-11-06 20:05   ` Yosry Ahmed
2026-11-09 21:22     ` Chen, Zide
2026-11-09 20:50   ` Jim Mattson
2026-11-06  1:39 ` [PATCH v3 09/18] perf/x86: Remove num_counters_{gp,fixed} from x86_pmu_capability Zide Chen
2026-11-06  1:39 ` [PATCH v3 10/18] KVM: x86/pmu: Document GLOBAL_STATUS_RESET passthrough erratum Zide Chen
2026-11-06 20:14   ` Yosry Ahmed
2026-11-10  0:41     ` Chen, Zide
2026-11-09 20:51   ` Jim Mattson
2026-11-06  1:39 ` [PATCH v3 11/18] KVM: x86/pmu: Emulate IA32_PERF_GLOBAL_STATUS_SET MSR Zide Chen
2026-11-06 20:35   ` Yosry Ahmed
2026-11-09 23:44     ` Chen, Zide
2026-11-09 20:53   ` Jim Mattson
2026-11-06  1:39 ` [PATCH v3 12/18] KVM: x86/pmu: Emulate IA32_PERF_GLOBAL_INUSE MSR Zide Chen
2026-11-09 20:54   ` Jim Mattson
2026-11-06  1:39 ` [PATCH v3 13/18] KVM: x86/pmu: Populate CPUID.0AH:ECX fixed-counter bitmap Zide Chen
2026-11-06 21:00   ` Yosry Ahmed
2026-11-09 20:41     ` Chen, Zide
2026-11-10  6:28       ` Mi, Dapeng
2026-11-10 16:29         ` Chen, Zide
2026-11-10 22:56           ` Chen, Zide
2026-11-11  0:25             ` Mi, Dapeng
2026-11-11  3:28               ` Chen, Zide
2026-11-11 15:37                 ` Sean Christopherson
2026-11-11 17:06                   ` Chen, Zide
2026-11-12 17:09                     ` Sean Christopherson [this message]
2026-11-06  1:39 ` [PATCH v3 14/18] KVM: x86/pmu: Factor out fixed counter control bit calculation Zide Chen
2026-11-06  1:39 ` [PATCH v3 15/18] KVM: x86/pmu: Mask only OS/USR bits when filtering fixed counters Zide Chen
2026-11-06 21:19   ` Jim Mattson
2026-11-06  1:39 ` [PATCH v3 16/18] KVM: x86/pmu: Ignore AnyThread bit if CPUID.0AH:EDX[15] is set Zide Chen
2026-11-09 20:56   ` Jim Mattson
2026-11-06  1:39 ` [PATCH v3 17/18] KVM: x86/pmu: Advertise PerfMon version 5 on Intel hosts Zide Chen
2026-11-06 21:20   ` Jim Mattson
2026-11-06  1:39 ` [PATCH v3 18/18] KVM: selftests: Support fixed counters bitmap in pmu_counters_test Zide Chen

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=avXyxMgGzRBGbBN3@google.com \
    --to=seanjc@google.com \
    --cc=Manali.Shukla@amd.com \
    --cc=Sandipan.Das@amd.com \
    --cc=ak@linux.intel.com \
    --cc=dapeng1.mi@linux.intel.com \
    --cc=eranian@google.com \
    --cc=jmattson@google.com \
    --cc=kvm@vger.kernel.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=mizhang@google.com \
    --cc=pbonzini@redhat.com \
    --cc=peterz@infradead.org \
    --cc=xudong.hao@intel.com \
    --cc=yosry@kernel.org \
    --cc=zide.chen@intel.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox