From: "Ilpo Järvinen" <ilpo.jarvinen@linux.intel.com>
To: Russ Weight <russell.h.weight@intel.com>
Cc: Xu Yilun <yilun.xu@intel.com>,
linux-fpga@vger.kernel.org, Wu Hao <hao.wu@intel.com>,
Tom Rix <trix@redhat.com>, Moritz Fischer <mdf@kernel.org>,
Lee Jones <lee@kernel.org>,
Matthew Gerlach <matthew.gerlach@linux.intel.com>,
Tianfei zhang <tianfei.zhang@intel.com>,
Mark Brown <broonie@kernel.org>,
Greg KH <gregkh@linuxfoundation.org>,
Marco Pagani <marpagan@redhat.com>,
LKML <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH v3 6/9] mfd: intel-m10-bmc: Downscope SPI defines & prefix with M10BMC_SPI
Date: Mon, 5 Dec 2022 11:31:06 +0200 (EET) [thread overview]
Message-ID: <b09aabe4-3f82-70f0-aca2-f1cdf7d6a26@linux.intel.com> (raw)
In-Reply-To: <2b253321-72ff-f15a-8879-aa41dce48055@intel.com>
[-- Attachment #1: Type: text/plain, Size: 1916 bytes --]
On Fri, 2 Dec 2022, Russ Weight wrote:
> On 12/2/22 08:28, Xu Yilun wrote:
> > On 2022-12-02 at 12:08:38 +0200, Ilpo Järvinen wrote:
> >> Move SPI based board definitions to per interface file from the global
> >> header. This makes it harder to use them accidently in the
> >> generic/interface agnostic code. Prefix the defines with M10BMC_SPI
> > I'm not sure if the register layout is actually bound to the bus
> > interface. My experience is the register layout is always decided by
> > board type. Is it possible there will be a new SPI based board but
> > has different register layout in future?
> >
> > So is M10BMC_SPI_XXX a good nam
>
> There could be future devices, spi or pmci based, that require different
> addresses for some of these values, and at that time we would need to
> additional versions of some of these macros using different names.
> Right now, spi and pmci are the primary differentiating factors. I'm not
> sure how to improve on the naming. Do you have any suggestions?
It's per board type yes, but there's a strong clustering currently on
spi/pmci differentiation. That implies a one define applies to multiple
board types so naming it, e.g., after a single board type seems not much
better than the current approach.
I've even thought myself of removing those defines as they seem one-time
use ones after introducing the csr_map. Defining the csr_map using members
kinda documents what a literal is about if I'd put just a number there.
The added benefit a few capital letters in a define provides is IMHO very
questionable.
Also m10bmc_spi_csr_map name suffers from the same problem, BTW.
I could, of course now that they're downscoped, drop _SPI_ or _PMCI_ from
their names if that's ok for you? ...But that wouldn't address the next
version naming problem at all. But I don't anyway know, without a crystal
ball, know how to address the future naming needs.
--
i.
next prev parent reply other threads:[~2022-12-05 9:31 UTC|newest]
Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-12-02 10:08 [PATCH v3 0/9] intel-m10-bmc: Split BMC to core and SPI parts & add PMCI+N6000 support Ilpo Järvinen
2022-12-02 10:08 ` [PATCH v3 1/9] mfd: intel-m10-bmc: Create m10bmc_platform_info for type specific info Ilpo Järvinen
2022-12-02 10:08 ` [PATCH v3 2/9] mfd: intel-m10-bmc: Rename the local variables Ilpo Järvinen
2022-12-02 10:08 ` [PATCH v3 3/9] mfd: intel-m10-bmc: Split into core and spi specific parts Ilpo Järvinen
2022-12-02 10:08 ` [PATCH v3 4/9] mfd: intel-m10-bmc: Support multiple CSR register layouts Ilpo Järvinen
2022-12-02 10:08 ` [PATCH v3 5/9] fpga: intel-m10-bmc: Rework flash read/write Ilpo Järvinen
2022-12-02 10:08 ` [PATCH v3 6/9] mfd: intel-m10-bmc: Downscope SPI defines & prefix with M10BMC_SPI Ilpo Järvinen
2022-12-02 16:28 ` Xu Yilun
2022-12-02 17:29 ` Russ Weight
2022-12-05 9:31 ` Ilpo Järvinen [this message]
2022-12-05 15:41 ` Xu Yilun
2022-12-08 11:57 ` Ilpo Järvinen
2022-12-02 10:08 ` [PATCH v3 7/9] mfd: intel-m10-bmc: Add PMCI driver Ilpo Järvinen
2022-12-02 17:12 ` Xu Yilun
2022-12-05 9:51 ` Ilpo Järvinen
2022-12-05 12:05 ` Mark Brown
2022-12-05 15:08 ` Xu Yilun
2022-12-05 18:22 ` Mark Brown
2022-12-06 2:37 ` Xu Yilun
2022-12-05 16:28 ` Xu Yilun
2022-12-02 10:08 ` [PATCH v3 8/9] fpga: m10bmc-sec: Add support for N6000 Ilpo Järvinen
2022-12-02 10:08 ` [PATCH v3 9/9] mfd: intel-m10-bmc: Change MODULE_LICENSE() to GPL Ilpo Järvinen
2022-12-04 9:44 ` Greg KH
2022-12-05 9:05 ` Ilpo Järvinen
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