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From: Baolu Lu <baolu.lu@linux.intel.com>
To: Tomasz Jeznach <tjeznach@rivosinc.com>,
	Joerg Roedel <joro@8bytes.org>, Will Deacon <will@kernel.org>,
	Robin Murphy <robin.murphy@arm.com>,
	Paul Walmsley <paul.walmsley@sifive.com>
Cc: baolu.lu@linux.intel.com, Palmer Dabbelt <palmer@dabbelt.com>,
	Albert Ou <aou@eecs.berkeley.edu>,
	Anup Patel <apatel@ventanamicro.com>,
	Sunil V L <sunilvl@ventanamicro.com>,
	Nick Kossifidis <mick@ics.forth.gr>,
	Sebastien Boeuf <seb@rivosinc.com>,
	Rob Herring <robh+dt@kernel.org>,
	Krzysztof Kozlowski <krzk+dt@kernel.org>,
	Conor Dooley <conor+dt@kernel.org>,
	devicetree@vger.kernel.org, iommu@lists.linux.dev,
	linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org,
	linux@rivosinc.com
Subject: Re: [PATCH v4 2/7] iommu/riscv: Add RISC-V IOMMU platform device driver
Date: Sat, 4 May 2024 10:05:14 +0800	[thread overview]
Message-ID: <b17ca96a-9e0c-43ca-9815-fee5a3661ad4@linux.intel.com> (raw)
In-Reply-To: <68afb8d5e45e82dfc818385e01e9ddaa659007e1.1714752293.git.tjeznach@rivosinc.com>

On 5/4/24 12:12 AM, Tomasz Jeznach wrote:
> Introduce platform device driver for implementation of RISC-V IOMMU
> architected hardware.
> 
> Hardware interface definition located in file iommu-bits.h is based on
> ratified RISC-V IOMMU Architecture Specification version 1.0.0.
> 
> This patch implements platform device initialization, early check and
> configuration of the IOMMU interfaces and enables global pass-through
> address translation mode (iommu_mode == BARE), without registering
> hardware instance in the IOMMU subsystem.
> 
> Link:https://github.com/riscv-non-isa/riscv-iommu
> Co-developed-by: Nick Kossifidis<mick@ics.forth.gr>
> Signed-off-by: Nick Kossifidis<mick@ics.forth.gr>
> Co-developed-by: Sebastien Boeuf<seb@rivosinc.com>
> Signed-off-by: Sebastien Boeuf<seb@rivosinc.com>
> Signed-off-by: Tomasz Jeznach<tjeznach@rivosinc.com>

Reviewed-by: Lu Baolu <baolu.lu@linux.intel.com>

Best regards,
baolu

  reply	other threads:[~2024-05-04  2:06 UTC|newest]

Thread overview: 22+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-05-03 16:12 [PATCH v4 0/7] Linux RISC-V IOMMU Support Tomasz Jeznach
2024-05-03 16:12 ` [PATCH v4 1/7] dt-bindings: iommu: riscv: Add bindings for RISC-V IOMMU Tomasz Jeznach
2024-05-07 14:48   ` Rob Herring (Arm)
2024-05-03 16:12 ` [PATCH v4 2/7] iommu/riscv: Add RISC-V IOMMU platform device driver Tomasz Jeznach
2024-05-04  2:05   ` Baolu Lu [this message]
2024-05-08 15:33   ` Zong Li
2024-05-03 16:12 ` [PATCH v4 3/7] iommu/riscv: Add RISC-V IOMMU PCIe " Tomasz Jeznach
2024-05-03 16:12 ` [PATCH v4 4/7] iommu/riscv: Enable IOMMU registration and device probe Tomasz Jeznach
2024-05-14  5:56   ` Zong Li
2024-05-14 18:19     ` Tomasz Jeznach
2024-05-03 16:12 ` [PATCH v4 5/7] iommu/riscv: Device directory management Tomasz Jeznach
2024-05-08 15:34   ` Zong Li
2024-05-03 16:12 ` [PATCH v4 6/7] iommu/riscv: Command and fault queue support Tomasz Jeznach
2024-05-08 15:38   ` Zong Li
2024-05-08 16:03     ` Tomasz Jeznach
2024-05-09  1:57       ` Zong Li
2024-05-03 16:12 ` [PATCH v4 7/7] iommu/riscv: Paging domain support Tomasz Jeznach
2024-05-04  2:03   ` Baolu Lu
2024-05-08 15:57   ` Zong Li
2024-05-08 16:13     ` Tomasz Jeznach
2024-05-09  7:14       ` Zong Li
2024-05-14 18:23         ` Tomasz Jeznach

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