From: "Chen, Zide" <zide.chen@intel.com>
To: Dapeng Mi <dapeng1.mi@linux.intel.com>,
Peter Zijlstra <peterz@infradead.org>,
Ingo Molnar <mingo@redhat.com>,
Arnaldo Carvalho de Melo <acme@kernel.org>,
Namhyung Kim <namhyung@kernel.org>,
Ian Rogers <irogers@google.com>,
Adrian Hunter <adrian.hunter@intel.com>,
Alexander Shishkin <alexander.shishkin@linux.intel.com>,
Andi Kleen <ak@linux.intel.com>,
Eranian Stephane <eranian@google.com>
Cc: linux-kernel@vger.kernel.org, linux-perf-users@vger.kernel.org,
Dapeng Mi <dapeng1.mi@intel.com>,
Falcon Thomas <thomas.falcon@intel.com>,
Xudong Hao <xudong.hao@intel.com>
Subject: Re: [Patch v2 1/2] perf/x86: Introduce is_x86_pmu() helper
Date: Thu, 30 Apr 2026 09:22:02 -0700 [thread overview]
Message-ID: <b75f8b75-6052-4da3-b1ee-dfa8f5dfd5a6@intel.com> (raw)
In-Reply-To: <20260316050838.3624051-1-dapeng1.mi@linux.intel.com>
On 3/15/2026 10:08 PM, Dapeng Mi wrote:
> From: Ian Rogers <irogers@google.com>
>
> To facilitate the detection of x86 PMU structures in upcoming patches,
> the is_x86_pmu() helper is introduced. Additionally, the is_x86_event()
> helper has been refactored to utilize is_x86_pmu().
>
> No function changes intended.
>
> Signed-off-by: Ian Rogers <irogers@google.com>
> Signed-off-by: Dapeng Mi <dapeng1.mi@linux.intel.com>
> ---
Reviewed-by: Zide Chen <zide.chen@intel.com>
> v2: new patch.
>
> arch/x86/events/core.c | 16 ----------------
> arch/x86/events/perf_event.h | 18 +++++++++++++++++-
> 2 files changed, 17 insertions(+), 17 deletions(-)
>
> diff --git a/arch/x86/events/core.c b/arch/x86/events/core.c
> index 810ab21ffd99..66b1a873c395 100644
> --- a/arch/x86/events/core.c
> +++ b/arch/x86/events/core.c
> @@ -774,22 +774,6 @@ void x86_pmu_enable_all(int added)
> }
> }
>
> -int is_x86_event(struct perf_event *event)
> -{
> - /*
> - * For a non-hybrid platforms, the type of X86 pmu is
> - * always PERF_TYPE_RAW.
> - * For a hybrid platform, the PERF_PMU_CAP_EXTENDED_HW_TYPE
> - * is a unique capability for the X86 PMU.
> - * Use them to detect a X86 event.
> - */
> - if (event->pmu->type == PERF_TYPE_RAW ||
> - event->pmu->capabilities & PERF_PMU_CAP_EXTENDED_HW_TYPE)
> - return true;
> -
> - return false;
> -}
> -
> struct pmu *x86_get_pmu(unsigned int cpu)
> {
> struct cpu_hw_events *cpuc = &per_cpu(cpu_hw_events, cpu);
> diff --git a/arch/x86/events/perf_event.h b/arch/x86/events/perf_event.h
> index fad87d3c8b2c..025f67726ecc 100644
> --- a/arch/x86/events/perf_event.h
> +++ b/arch/x86/events/perf_event.h
> @@ -115,7 +115,23 @@ static inline bool is_topdown_event(struct perf_event *event)
> return is_metric_event(event) || is_slots_event(event);
> }
>
> -int is_x86_event(struct perf_event *event);
> +static inline bool is_x86_pmu(struct pmu *pmu)
> +{
> + /*
> + * For a non-hybrid platforms, the type of X86 pmu is
> + * always PERF_TYPE_RAW.
> + * For a hybrid platform, the PERF_PMU_CAP_EXTENDED_HW_TYPE
> + * is a unique capability for the X86 PMU.
> + * Use them to detect a X86 event.
> + */
> + return pmu->type == PERF_TYPE_RAW ||
> + pmu->capabilities & PERF_PMU_CAP_EXTENDED_HW_TYPE;
> +}
> +
> +static inline bool is_x86_event(struct perf_event *event)
> +{
> + return is_x86_pmu(event->pmu);
> +}
>
> static inline bool check_leader_group(struct perf_event *leader, int flags)
> {
>
> base-commit: becb26c89be3a6448dcd92522894427544d5b091
prev parent reply other threads:[~2026-04-30 16:22 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-03-16 5:08 [Patch v2 1/2] perf/x86: Introduce is_x86_pmu() helper Dapeng Mi
2026-03-16 5:08 ` [Patch v2 2/2] perf/x86: Update cap_user_rdpmc base on rdpmc user disable state Dapeng Mi
2026-04-30 16:22 ` Chen, Zide
2026-04-30 16:22 ` Chen, Zide [this message]
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