From: Ethan Zhao <haifeng.zhao@linux.intel.com>
To: Lu Baolu <baolu.lu@linux.intel.com>,
Joerg Roedel <joro@8bytes.org>, Kevin Tian <kevin.tian@intel.com>,
Ashok Raj <ashok.raj@intel.com>
Cc: Chenyi Qiang <chenyi.qiang@intel.com>,
Liu Yi L <yi.l.liu@intel.com>,
Jacob jun Pan <jacob.jun.pan@intel.com>,
iommu@lists.linux-foundation.org, iommu@lists.linux.dev,
linux-kernel@vger.kernel.org, stable@vger.kernel.org
Subject: Re: [PATCH v2 1/1] iommu/vt-d: Fix RID2PASID setup failure
Date: Wed, 22 Jun 2022 17:09:32 +0800 [thread overview]
Message-ID: <b7834cb5-4836-fb2d-1570-a46440341bed@linux.intel.com> (raw)
In-Reply-To: <20220622044120.21813-1-baolu.lu@linux.intel.com>
Hi,
在 2022/6/22 12:41, Lu Baolu 写道:
> The IOMMU driver shares the pasid table for PCI alias devices. When the
> RID2PASID entry of the shared pasid table has been filled by the first
> device, the subsequent devices will encounter the "DMAR: Setup RID2PASID
> failed" failure as the pasid entry has already been marked as present. As
> the result, the IOMMU probing process will be aborted.
>
> This fixes it by skipping RID2PASID setting if the pasid entry has been
> populated. This works because the IOMMU core ensures that only the same
> IOMMU domain can be attached to all PCI alias devices at the same time.
> Therefore the subsequent devices just try to setup the RID2PASID entry
> with the same domain, which is negligible. This also adds domain validity
> checks for more confidence anyway.
>
> Fixes: ef848b7e5a6a0 ("iommu/vt-d: Setup pasid entry for RID2PASID support")
> Reported-by: Chenyi Qiang <chenyi.qiang@intel.com>
> Cc: stable@vger.kernel.org
> Signed-off-by: Lu Baolu <baolu.lu@linux.intel.com>
> ---
> drivers/iommu/intel/pasid.c | 22 ++++++++++++++++------
> 1 file changed, 16 insertions(+), 6 deletions(-)
>
> Change log:
> v2:
> - Add domain validity check in RID2PASID entry setup.
>
> diff --git a/drivers/iommu/intel/pasid.c b/drivers/iommu/intel/pasid.c
> index cb4c1d0cf25c..4f3525f3346f 100644
> --- a/drivers/iommu/intel/pasid.c
> +++ b/drivers/iommu/intel/pasid.c
> @@ -575,6 +575,19 @@ static inline int pasid_enable_wpe(struct pasid_entry *pte)
> return 0;
> };
>
> +/*
> + * Return true if @pasid is RID2PASID and the domain @did has already
> + * been setup to the @pte. Otherwise, return false. PCI alias devices
> + * probably share the single RID2PASID pasid entry in the shared pasid
> + * table. It's reasonable that those devices try to set a share domain
> + * in their probe paths.
> + */
I am thinking about the counter-part, the intel_pasid_tear_down_entry(),
Multi devices share the same PASID entry, then one was detached from the
domain,
so the entry doesn't exist anymore, while another devices don't know
about the change,
and they are using the mapping, is it possible case ?shared thing, no
refer-counter,
am I missing something ?
Thanks,
Ethan
> +static inline bool
> +rid2pasid_domain_valid(struct pasid_entry *pte, u32 pasid, u16 did)
> +{
> + return pasid == PASID_RID2PASID && pasid_get_domain_id(pte) == did;
> +}
> +
> /*
> * Set up the scalable mode pasid table entry for first only
> * translation type.
> @@ -595,9 +608,8 @@ int intel_pasid_setup_first_level(struct intel_iommu *iommu,
> if (WARN_ON(!pte))
> return -EINVAL;
>
> - /* Caller must ensure PASID entry is not in use. */
> if (pasid_pte_is_present(pte))
> - return -EBUSY;
> + return rid2pasid_domain_valid(pte, pasid, did) ? 0 : -EBUSY;
>
> pasid_clear_entry(pte);
>
> @@ -698,9 +710,8 @@ int intel_pasid_setup_second_level(struct intel_iommu *iommu,
> return -ENODEV;
> }
>
> - /* Caller must ensure PASID entry is not in use. */
> if (pasid_pte_is_present(pte))
> - return -EBUSY;
> + return rid2pasid_domain_valid(pte, pasid, did) ? 0 : -EBUSY;
>
> pasid_clear_entry(pte);
> pasid_set_domain_id(pte, did);
> @@ -738,9 +749,8 @@ int intel_pasid_setup_pass_through(struct intel_iommu *iommu,
> return -ENODEV;
> }
>
> - /* Caller must ensure PASID entry is not in use. */
> if (pasid_pte_is_present(pte))
> - return -EBUSY;
> + return rid2pasid_domain_valid(pte, pasid, did) ? 0 : -EBUSY;
>
> pasid_clear_entry(pte);
> pasid_set_domain_id(pte, did);
--
AFAIK = As Far As I Know
AKA = Also Known As
ASAP = As Soon As Possible
next prev parent reply other threads:[~2022-06-22 9:11 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-06-22 4:41 [PATCH v2 1/1] iommu/vt-d: Fix RID2PASID setup failure Lu Baolu
2022-06-22 5:26 ` Tian, Kevin
2022-06-22 9:09 ` Ethan Zhao [this message]
2022-06-22 14:27 ` Baolu Lu
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=b7834cb5-4836-fb2d-1570-a46440341bed@linux.intel.com \
--to=haifeng.zhao@linux.intel.com \
--cc=ashok.raj@intel.com \
--cc=baolu.lu@linux.intel.com \
--cc=chenyi.qiang@intel.com \
--cc=iommu@lists.linux-foundation.org \
--cc=iommu@lists.linux.dev \
--cc=jacob.jun.pan@intel.com \
--cc=joro@8bytes.org \
--cc=kevin.tian@intel.com \
--cc=linux-kernel@vger.kernel.org \
--cc=stable@vger.kernel.org \
--cc=yi.l.liu@intel.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox