From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from out-187.mta1.migadu.com (out-187.mta1.migadu.com [95.215.58.187]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 840F921D3E8 for ; Thu, 13 Nov 2025 23:07:18 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=95.215.58.187 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1763075240; cv=none; b=P5EjC6S2kvUS7VXisFOEZ9sCHthdqZ0wt2CXdd2ZzWkTvInrL5PRhIygFJZtO4I+Ww90NqUYCao8KVOCwz6By0NSKRwmmgCttj4Gdh3MVl1uzhi2RsFVCHOIMshvGW2Q1Nrg0gQA1S/9CWurVeUFh0OYlSmOl+qtY6u3TTRk84k= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1763075240; c=relaxed/simple; bh=WCbYGn4A2hkWm1m163j5Jm9uVtprH84z4pdTP26hj7k=; h=Message-ID:Date:MIME-Version:Subject:To:Cc:References:From: In-Reply-To:Content-Type; b=B2o1HKvQyJXUffBrXuhLQstyTTBgr2PFzK1jXzDIJstVXFz7vRJV7eqIptF9njNEchQz5dVOFz/B6vtSK6S0SKeuWWG16DKWX03wz9t4F2cedis++nyPF798LRIq02Jdux+r+29xp6HTw5JNXlq40LntpQHhR09VAVkp6SFCmfg= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.dev; spf=pass smtp.mailfrom=linux.dev; dkim=pass (1024-bit key) header.d=linux.dev header.i=@linux.dev header.b=SBxGfgBc; arc=none smtp.client-ip=95.215.58.187 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.dev Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linux.dev Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linux.dev header.i=@linux.dev header.b="SBxGfgBc" Message-ID: DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linux.dev; s=key1; t=1763075236; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=oNlP3ns8VDppIWf6JUhMHR8RskYRryaARqBgPGOIgB4=; b=SBxGfgBc8I66z9OwND+wQTpzsICUh8sCuHclbXpRYW/l6+BFt0ca+M5i9JTso3vrBRiZ4+ nJmSkYk63SftM6KGE2HTJg9emx330lYXxOcYJOOMjnDZB9Kh5zujiN0qq7riQGteHc7RfL uitjVW2UXVUOxDMITwgVFw4FgmqxCkU= Date: Thu, 13 Nov 2025 18:07:07 -0500 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Subject: Re: [PATCH 3/3] drm: zynqmp: Add blend mode property to graphics plane To: "Klymenko, Anatoliy" , Laurent Pinchart , Tomi Valkeinen , "dri-devel@lists.freedesktop.org" Cc: "linux-kernel@vger.kernel.org" , Mike Looijmans , David Airlie , Thomas Zimmermann , Maarten Lankhorst , Maxime Ripard , "linux-arm-kernel@lists.infradead.org" , Simona Vetter , "Simek, Michal" References: <20251113203715.2768107-1-sean.anderson@linux.dev> <20251113203715.2768107-4-sean.anderson@linux.dev> Content-Language: en-US X-Report-Abuse: Please report any abuse attempt to abuse@migadu.com and include these headers. From: Sean Anderson In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-Migadu-Flow: FLOW_OUT On 11/13/25 18:03, Klymenko, Anatoliy wrote: > [AMD Official Use Only - AMD Internal Distribution Only] > > Hi Sean, > > Thank you for the patch. > >> -----Original Message----- >> From: Sean Anderson >> Sent: Thursday, November 13, 2025 12:37 PM >> To: Laurent Pinchart ; Tomi Valkeinen >> ; dri-devel@lists.freedesktop.org >> Cc: linux-kernel@vger.kernel.org; Mike Looijmans ; >> David Airlie ; Thomas Zimmermann >> ; Maarten Lankhorst >> ; Klymenko, Anatoliy >> ; Maxime Ripard ; linux- >> arm-kernel@lists.infradead.org; Simona Vetter ; Simek, >> Michal ; Sean Anderson >> >> Subject: [PATCH 3/3] drm: zynqmp: Add blend mode property to graphics plane >> >> Caution: This message originated from an External Source. Use proper caution >> when opening attachments, clicking links, or responding. >> >> >> When global alpha is enabled, per-pixel alpha is ignored. Allow >> userspace to explicitly specify whether to use per-pixel alpha by >> exposing it through the blend mode property. I'm not sure whether the >> per-pixel alpha is pre-multiplied or not [1], but apparently it *must* be >> pre-multiplied so I guess we have to advertise it. >> >> [1] All we get is "The alpha value available with the graphics stream >> will define the transparency of the graphics." >> >> Signed-off-by: Sean Anderson >> --- >> >> drivers/gpu/drm/xlnx/zynqmp_kms.c | 24 ++++++++++++++++++++++-- >> 1 file changed, 22 insertions(+), 2 deletions(-) >> >> diff --git a/drivers/gpu/drm/xlnx/zynqmp_kms.c >> b/drivers/gpu/drm/xlnx/zynqmp_kms.c >> index 456ada9ac003..fa1cfc16db36 100644 >> --- a/drivers/gpu/drm/xlnx/zynqmp_kms.c >> +++ b/drivers/gpu/drm/xlnx/zynqmp_kms.c >> @@ -61,6 +61,13 @@ static int zynqmp_dpsub_plane_atomic_check(struct >> drm_plane *plane, >> if (!new_plane_state->crtc) >> return 0; >> >> + if (new_plane_state->pixel_blend_mode != >> DRM_MODE_BLEND_PIXEL_NONE && >> + new_plane_state->alpha >> 8 != 0xff) { >> + drm_dbg_kms(plane->dev, >> + "Plane alpha must be 1.0 when using pixel alpha\n"); >> + return -EINVAL; >> + } >> + >> crtc_state = drm_atomic_get_crtc_state(state, new_plane_state->crtc); >> if (IS_ERR(crtc_state)) >> return PTR_ERR(crtc_state); >> @@ -117,9 +124,13 @@ static void >> zynqmp_dpsub_plane_atomic_update(struct drm_plane *plane, >> >> zynqmp_disp_layer_update(layer, new_state); >> >> - if (plane->index == ZYNQMP_DPSUB_LAYER_GFX) >> - zynqmp_disp_blend_set_global_alpha(dpsub->disp, true, >> + if (plane->index == ZYNQMP_DPSUB_LAYER_GFX) { >> + bool blend = plane->state->pixel_blend_mode == >> + DRM_MODE_BLEND_PIXEL_NONE; >> + >> + zynqmp_disp_blend_set_global_alpha(dpsub->disp, blend, >> plane->state->alpha >> 8); >> + } >> >> /* >> * Unconditionally enable the layer, as it may have been disabled >> @@ -179,9 +190,18 @@ static int zynqmp_dpsub_create_planes(struct >> zynqmp_dpsub *dpsub) >> return ret; >> >> if (i == ZYNQMP_DPSUB_LAYER_GFX) { >> + unsigned int blend_modes = >> + BIT(DRM_MODE_BLEND_PIXEL_NONE) | >> + BIT(DRM_MODE_BLEND_PREMULTI); > > | BIT(DRM_MODE_BLEND_COVERAGE) - this is what implemented in the hardware. Do you have a datasheet (or other) reference? But in any case, DRM_MODE_BLEND_PREMULTI is mandatory even if we don't support it. See drm_plane_create_blend_mode_property for details. --Sean