From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 2CB40372B23 for ; Thu, 7 May 2026 16:03:41 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1778169824; cv=none; b=RRDrS5HW7hocSqbKPZ0rR6CZ4ZaSvKlV8BKMPQl8zBIEDQCe/6ua9lMOEjofQvnFxUwbxS/khwsslGNSOrB8Ova1mIZPKEgzkOKFg0qW3aJq8zBNhGTcrMuvTgVvK/hziQ1CzT9CguVASFolMOlsQuVoCjEaU5g0Ls3VkcjdN2U= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1778169824; c=relaxed/simple; bh=tiS1CF4xwZtTPzaUlNB7YfKrijbiOLCs8ErKVDBsQrs=; h=Message-ID:Date:MIME-Version:From:Subject:To:Cc:References: In-Reply-To:Content-Type; b=FPX50oc+0PtPMhIjneci41lpA0XDuZvayzeOhkMn/623WxKdbMb7aeKdv+aL5tMX+g65aLexKzfle6Fcm0zJi3SPE/Ikn9k87SnT/211A5kQmu2iNxJPJhq36LCAgqKCHpQy3UrBehgwdenI0z+5M3m8GlG8smhoeDYUCfjKnEs= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com; spf=pass smtp.mailfrom=arm.com; dkim=pass (1024-bit key) header.d=arm.com header.i=@arm.com header.b=riOfFVv6; arc=none smtp.client-ip=217.140.110.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=arm.com header.i=@arm.com header.b="riOfFVv6" Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 01B9F3558; Thu, 7 May 2026 09:03:36 -0700 (PDT) Received: from [10.1.196.96] (eglon.cambridge.arm.com [10.1.196.96]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 4559A3F763; Thu, 7 May 2026 09:03:38 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=arm.com; s=foss; t=1778169821; bh=tiS1CF4xwZtTPzaUlNB7YfKrijbiOLCs8ErKVDBsQrs=; h=Date:From:Subject:To:Cc:References:In-Reply-To:From; b=riOfFVv6C6yVxErR2wjQwnAzJHlaUXH/xcDnhM7+B7xdNZkaSLYDQJcZZ4sLGY6fs neHgwUlx/AJ5xYCN0tcZlPmxQUPRa7i5MsYKPyq9R8WKWhKnK6TyenLJFCrhn/vZ2c 2BGOpJTytYPMljyFRBL1A5eGX5a5rrbMhdJJcPXc= Message-ID: Date: Thu, 7 May 2026 17:03:36 +0100 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird From: James Morse Subject: Re: [PATCH v2 2/2] arm_mpam: Update architecture version check for MPAM MSC To: Zeng Heng , xry111@xry111.site, catalin.marinas@arm.com, maz@kernel.org, ardb@kernel.org, yang@os.amperecomputing.com, ryan.roberts@arm.com, kevin.brodsky@arm.com, reinette.chatre@intel.com, miko.lenczewski@arm.com, will@kernel.org, suzuki.poulose@arm.com, thuth@redhat.com, ben.horgan@arm.com, james.clark@linaro.org, lpieralisi@kernel.org, broonie@kernel.org, oupton@kernel.org, anshuman.khandual@arm.com, yeoreum.yun@arm.com, leo.yan@arm.com, mrigendra.chaubey@gmail.com, fenghuay@nvidia.com, ahmed.genidi@arm.com, mark.rutland@arm.com Cc: linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, wangkefeng.wang@huawei.com References: <20260203095406.6437-1-zengheng4@huawei.com> <20260203095406.6437-3-zengheng4@huawei.com> Content-Language: en-GB In-Reply-To: <20260203095406.6437-3-zengheng4@huawei.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit Hi Zeng, On 03/02/2026 09:54, Zeng Heng wrote: > In addition to updating the CPU MPAM version check, the MPAM MSC version > check also need to be updated. mpam_msc_check_aidr() is added to check > the MSC AIDR register, ensuring that both the major and minor version > numbers fall within the supported range of the MPAM architecture version. > diff --git a/drivers/resctrl/mpam_devices.c b/drivers/resctrl/mpam_devices.c > index 744df3a6a078..a58031f0a280 100644 > --- a/drivers/resctrl/mpam_devices.c > +++ b/drivers/resctrl/mpam_devices.c > @@ -202,6 +202,17 @@ static inline void _mpam_write_monsel_reg(struct mpam_msc *msc, u16 reg, u32 val > > #define mpam_write_monsel_reg(msc, reg, val) _mpam_write_monsel_reg(msc, MSMON_##reg, val) > > +static bool mpam_msc_check_aidr(struct mpam_msc *msc) > +{ > + u32 rev; > + > + rev = __mpam_read_reg(msc, MPAMF_AIDR) & MPAMF_AIDR_ARCH_REV; > + > + return rev == MPAM_ARCHITECTURE_V0_1 || > + rev == MPAM_ARCHITECTURE_V1_0 || > + rev == MPAM_ARCHITECTURE_V1_1; > +} > + > static u64 mpam_msc_read_idr(struct mpam_msc *msc) > { > u64 idr_high = 0, idr_low; > @@ -842,9 +853,8 @@ static int mpam_msc_hw_probe(struct mpam_msc *msc) > > lockdep_assert_held(&msc->probe_lock); > > - idr = __mpam_read_reg(msc, MPAMF_AIDR); > - if ((idr & MPAMF_AIDR_ARCH_MAJOR_REV) != MPAM_ARCHITECTURE_V1) { > - dev_err_once(dev, "MSC does not match MPAM architecture v1.x\n"); This deliberately only checks the major number. (The MSC architecture always had a major and minor number). Before your change, MPAM v1.2 is supported, after we'd get an error for a MPAM v1.2 MSC. (if such a thing exists) I think its simpler to rule out the unsupported combinations, something like: | static bool mpam_msc_check_aidr(struct mpam_msc *msc) | { | u32 rev; | | rev = __mpam_read_reg(msc, MPAMF_AIDR) & MPAMF_AIDR_ARCH_REV; | | /* | * v0.0 and >v2.x aren't supported, but anything else should be backward | * compatible to v0.1 or v1.0. | */ | if (!rev) | return false; | if (rev & MPAMF_AIDR_ARCH_MAJOR_REV > MPAM_ARCHITECTURE_V1) | return false; | | return true; | } > + if (!mpam_msc_check_aidr(msc)) { > + dev_err_once(dev, "MSC does not match MPAM architecture\n"); > return -EIO; > } I'd like to keep the 'v1.x' in this message - this should help folk with old stable kernels running on new hardware work out why the feature isn't available. (assuming they have some documentation that says v2.0 in it!) I've rebased this with the above changes, which I'll post shortly for fixes. Thanks, James