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Subject: Re: [PATCH] arm64: Subscribe Microsoft Azure Cobalt 100 to ARM
 Neoverse N2 errata
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From: Easwar Hariharan <eahariha@linux.microsoft.com>
To: Oliver Upton <oliver.upton@linux.dev>
Cc: Catalin Marinas <catalin.marinas@arm.com>, Will Deacon <will@kernel.org>,
 Jonathan Corbet <corbet@lwn.net>, Marc Zyngier <maz@kernel.org>,
 Andre Przywara <andre.przywara@arm.com>, Rob Herring <robh@kernel.org>,
 Zenghui Yu <yuzenghui@huawei.com>, Mark Rutland <mark.rutland@arm.com>,
 "moderated list:ARM64 PORT (AARCH64 ARCHITECTURE)"
 <linux-arm-kernel@lists.infradead.org>,
 "open list:DOCUMENTATION" <linux-doc@vger.kernel.org>,
 open list <linux-kernel@vger.kernel.org>,
 Anshuman Khandual <anshuman.khandual@arm.com>, stable@vger.kernel.org
References: <20240212232909.2276378-1-eahariha@linux.microsoft.com>
 <ZcqtUxhqUbYoRH-G@linux.dev>
 <18b3ac3e-2bfc-4fce-9be4-3e75e487f9fc@linux.microsoft.com>
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On 2/13/2024 4:19 PM, Easwar Hariharan wrote:
> On 2/12/2024 3:44 PM, Oliver Upton wrote:
>> Hi Easwar,
>>
>> On Mon, Feb 12, 2024 at 11:29:06PM +0000, Easwar Hariharan wrote:
>>> Add the MIDR value of Microsoft Azure Cobalt 100, which is a Microsoft
>>> implemented CPU based on r0p0 of the ARM Neoverse N2 CPU, and therefore
>>> suffers from all the same errata.
>>
>> Can you comment at all on where one might find this MIDR? That is, does
>> your hypervisor report the native MIDR of the implementation or does it
>> repaint it as an Arm Neoverse N2 (0x410FD490)?
> 
> We will check on the Microsoft hypervisor's plans, and get back to you.
> 
> Notwithstanding that, we do have baremetal use cases for Microsoft Azure Cobalt 100
> as well where this MIDR value will show through.
> 

<snip>

We checked in with our Microsoft hypervisor colleagues, and they do repaint the
Azure Cobalt 100 as an Arm Neoverse N2, but again, we do have baremetal use cases. 

Thanks,
Easwar