From: Krzysztof Kozlowski <krzk@kernel.org>
To: Yuvaraj Ranganathan <quic_yrangana@quicinc.com>,
Herbert Xu <herbert@gondor.apana.org.au>,
"David S. Miller" <davem@davemloft.net>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Bjorn Andersson <andersson@kernel.org>,
Konrad Dybcio <konradybcio@kernel.org>
Cc: linux-arm-msm@vger.kernel.org, linux-crypto@vger.kernel.org,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Subject: Re: [PATCH V2 2/2] arm64: dts: qcom: qcs8300: enable the inline crypto engine
Date: Fri, 22 Nov 2024 15:55:57 +0100 [thread overview]
Message-ID: <bb2da224-2c0a-41de-b458-0c5314ecd90b@kernel.org> (raw)
In-Reply-To: <20241122132044.30024-3-quic_yrangana@quicinc.com>
On 22/11/2024 14:20, Yuvaraj Ranganathan wrote:
> Add an ICE node to qcs8300 SoC description and enable it by adding a
> phandle to the UFS node.
>
> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
This did not happen. Provide a proof (lore link).
Best regards,
Krzysztof
next prev parent reply other threads:[~2024-11-22 14:56 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-11-22 13:20 [PATCH V2 0/2] Enable Inline crypto engine for QCS8300 Yuvaraj Ranganathan
2024-11-22 13:20 ` [PATCH V2 1/2] dt-bindings: crypto: ice: document the qcs8300 inline crypto engine Yuvaraj Ranganathan
2024-11-22 13:20 ` [PATCH V2 2/2] arm64: dts: qcom: qcs8300: enable the " Yuvaraj Ranganathan
2024-11-22 13:32 ` Konrad Dybcio
2024-11-22 14:55 ` Krzysztof Kozlowski [this message]
2024-11-25 6:00 ` Yuvaraj Ranganathan
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