From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7C72DC433F5 for ; Mon, 16 May 2022 14:30:31 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S244209AbiEPOaa (ORCPT ); Mon, 16 May 2022 10:30:30 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:44008 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S241425AbiEPOa1 (ORCPT ); Mon, 16 May 2022 10:30:27 -0400 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id 25C113B2B6 for ; Mon, 16 May 2022 07:30:27 -0700 (PDT) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id D259B1063; Mon, 16 May 2022 07:30:26 -0700 (PDT) Received: from [10.57.82.175] (unknown [10.57.82.175]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 225963F73D; Mon, 16 May 2022 07:30:24 -0700 (PDT) Message-ID: Date: Mon, 16 May 2022 15:30:19 +0100 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (Windows NT 10.0; rv:91.0) Gecko/20100101 Thunderbird/91.9.0 Subject: Re: [PATCH 1/1] perf: hisi: Make irq shared Content-Language: en-GB To: Chen Jun , linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, zhangshaokun@hisilicon.com, will@kernel.org, mark.rutland@arm.com Cc: xuqiang36@huawei.com References: <20220516130500.39586-1-chenjun102@huawei.com> From: Robin Murphy In-Reply-To: <20220516130500.39586-1-chenjun102@huawei.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 2022-05-16 14:05, Chen Jun wrote: > On some platforms, there are some error: > genirq: Flags mismatch irq 23. 00010804 (xxx) vs. 00010804 (xxx) > > The reason is that there are more than one pmu nodes using the same > irq number. > > Add IROF_SHARED when devm_request_irq. You really need more than this to share an interrupt between multiple PMUs correctly. Perf relies on IRQs being handled on event->cpu to provide mutual exclusion - if another PMU comes along and moves the interrupt affinity to a different CPU, the interrupt handler may update the event state from that CPU simultaneously with a regular API call on event->cpu also updating it, with potential corruption as a result. For general solutions, one option is to add a layer of explicit interrupt management like arm_dmc620_pmu (FWIW the original idea there was to factor that out into common helpers anyway). It's possible that IRQ affinity notifiers might work as an alternative approach too, but I never got round to looking into that in detail. Thanks, Robin. > Signed-off-by: Chen Jun > --- > drivers/perf/hisilicon/hisi_uncore_pmu.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/drivers/perf/hisilicon/hisi_uncore_pmu.c b/drivers/perf/hisilicon/hisi_uncore_pmu.c > index 358e4e284a62..bcbd3b467f34 100644 > --- a/drivers/perf/hisilicon/hisi_uncore_pmu.c > +++ b/drivers/perf/hisilicon/hisi_uncore_pmu.c > @@ -168,7 +168,7 @@ int hisi_uncore_pmu_init_irq(struct hisi_pmu *hisi_pmu, > return irq; > > ret = devm_request_irq(&pdev->dev, irq, hisi_uncore_pmu_isr, > - IRQF_NOBALANCING | IRQF_NO_THREAD, > + IRQF_NOBALANCING | IRQF_NO_THREAD | IRQF_SHARED, > dev_name(&pdev->dev), hisi_pmu); > if (ret < 0) { > dev_err(&pdev->dev,