From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id CA779213233; Thu, 12 Dec 2024 12:25:58 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1734006358; cv=none; b=TzAq7cuUWHzptRqgsIRN8XhsZWHRaXAlsn8Ra8Yock88unIVkW2sMM+csbwyoPoLZQolWppUd0NaJV5lQ6YW9bBpMbDQDi2g3cH4Si1+LINpFQj7c93HyEdQQRpT2gDpcYY9dzu1J1iYqda+z+zPjAc8WW4FOMgUQtb6+Xp0sa4= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1734006358; c=relaxed/simple; bh=454YXdXYIhrZrIidxbsK18dYxlgZMNqtfmRPI0uCBPU=; h=Message-ID:Date:MIME-Version:Subject:To:Cc:References:From: In-Reply-To:Content-Type; b=ZEvUm+rTFGoFhZu22cA90BTzIVyzwFdRcQjpOMLfVb7+Yy0w6il14x9lpdlLiHnsLv1CqEjeVuF/iyxkcrqdXjjnQ0WJZEGNFMnihJhRfOLgmHY64Xe9JbpMEBt5wdi33Eq70OPpOr/0KR7LMDnh/uvxBwzjVXsCxaPHxPLs87w= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=WsivXwu1; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="WsivXwu1" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 36BDCC4CECE; Thu, 12 Dec 2024 12:25:53 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1734006358; bh=454YXdXYIhrZrIidxbsK18dYxlgZMNqtfmRPI0uCBPU=; h=Date:Subject:To:Cc:References:From:In-Reply-To:From; b=WsivXwu1uLDqdln7Quzwb+hgeRMirTMyj8ttFrY5p9clyp/NjDP22wlhfvjKxftJi WwCRSZsVls/xLzcCvnUPCnlrOLI9ipQwQX2a/Nk5Ym3K0A3f9ic9C8Gm9kQ39y+eW2 Dzn2EDEZ8VfntTwwrTGRsgaIItFKociecyy4MvP3eYmRpW6Bv2iJ79hr6ltiOYHehJ CK9+pG1OOBD00v38awsNGm0wpbfjkYEO7AskNLP7Ospvhvyal9709cyzrU9ds2BEJs jlzsSK+D3ieLcA0AHihJiTLAQiVyELb/kGiYk33NLFjEyOmnoqiQ1bh7De6EG1BP6n sUaL2U3hzOwNw== Message-ID: Date: Thu, 12 Dec 2024 13:25:51 +0100 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 1/4] arm64: dts: qcom: x1e80100: Add PCIe lane equalization preset properties To: Krishna Chaitanya Chundru , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Bjorn Helgaas , Jingoo Han , Manivannan Sadhasivam , Lorenzo Pieralisi , =?UTF-8?Q?Krzysztof_Wilczy=C5=84ski?= Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org, konrad.dybcio@oss.qualcomm.com, quic_mrana@quicinc.com, quic_vbadigan@quicinc.com, Bjorn Andersson , Konrad Dybcio , Krishna chaitanya chundru References: <20241212-preset_v2-v2-0-210430fbcd8a@oss.qualcomm.com> <20241212-preset_v2-v2-1-210430fbcd8a@oss.qualcomm.com> From: Krzysztof Kozlowski Content-Language: en-US Autocrypt: addr=krzk@kernel.org; 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charset=UTF-8 Content-Transfer-Encoding: 7bit On 12/12/2024 11:32, Krishna Chaitanya Chundru wrote: > From: Krishna chaitanya chundru > > Add PCIe lane equalization preset properties for 8 GT/s and 16 GT/s data > rates used in lane equalization procedure. > > Signed-off-by: Krishna Chaitanya Chundru > --- > arch/arm64/boot/dts/qcom/x1e80100.dtsi | 8 ++++++++ > 1 file changed, 8 insertions(+) > > diff --git a/arch/arm64/boot/dts/qcom/x1e80100.dtsi b/arch/arm64/boot/dts/qcom/x1e80100.dtsi > index a36076e3c56b..6a2074297030 100644 > --- a/arch/arm64/boot/dts/qcom/x1e80100.dtsi > +++ b/arch/arm64/boot/dts/qcom/x1e80100.dtsi > @@ -2993,6 +2993,10 @@ &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>, > phys = <&pcie6a_phy>; > phy-names = "pciephy"; > > + eq-presets-8gts = /bits/ 16 <0x5555 0x5555>; > + > + eq-presets-16gts = /bits/ 8 <0x55 0x55>; NAK for two reasons (stated many times during review): 1. There is no way driver code can depend on DTS, unless you fix something serious but nothing is explained about that serious fix in commit msg. 2. There are no such properties. It does not look like you tested the DTS against bindings. Please run `make dtbs_check W=1` (see Documentation/devicetree/bindings/writing-schema.rst or https://www.linaro.org/blog/tips-and-tricks-for-validating-devicetree-sources-with-the-devicetree-schema/ for instructions). Best regards, Krzysztof