Re: [PATCH] AES i586-asm optimized

[davidsen@tmr.com (bill davidsen)]

In article <3F6095B5.9010100@pobox.com>,
Jeff Garzik  <jgarzik@pobox.com> wrote:
| Jari Ruusu wrote:

| > It uses classic Pentium instruction set. Speed optimized for my 300 MHz
| > Pentium-2 test box. Original Gladman version that I started with was pretty
| > fast but I was able to improve performance about 7% over original version.
| > 
| > On my same 300 MHz P2 test box, assembler implementation is about twice as
| > fast as the mainline kernel C implementation.
| 
| 
| Neat.  Consider me surprised, then  ;-)
| 
| Don't take my message as objection to the merge.  I dunno what DaveM or 
| JamesM thinks, but I definitely support merging patches like this.  It 
| provides a great example, if nothing else.
| 
| Eventually I bet there will be issues about automatic algorithm 
| selection:  like the RAID5 code, which benchmarks all available 
| algorithms, and selects the fastest one.

Didn't we just have this discussion? ;-) RAID5 benchmarks all available
code and then uses SSE2 or whatever because it doesn't plunk the
registers or cache or something... sorry, the details escape me, or the
sorry details escape me, or whatever.

BTW: I do agree with your point here, I'm using cryptoloop for some
stuff I'm doing, and while I never do enough disk i/o to care, this is a
good thing for the future. I'm using a PII-350, but next month I have to
add a P55C SMP machine, and will be doing much more crypto.

Thanks for asking for clarification, the patch looks better for it.
-- 
bill davidsen <davidsen@tmr.com>
  CTO, TMR Associates, Inc
Doing interesting things with little computers since 1979.