RE: [PATCH] 2.6 workaround for Athlon/Opteron prefetch errata

richard.brunner
2003-09-16T02:27:27Z

Bill,

FWIW, I think you are on the right track!

I may haggle over really "*slow* it in some way",
but I think that can be worked out. It just a nit
in the grand scheme.

Thanks!

] -Rich ...
] AMD Fellow
] richard.brunner at amd com

> -----Original Message-----
> From: Bill Davidsen [mailto:davidsen@tmr.com]
> Sent: Monday, September 15, 2003 5:27 PM
> To: Adrian Bunk
> Cc: John Bradford; zwane@linuxpower.ca; linux-kernel@vger.kernel.org
> Subject: Re: [PATCH] 2.6 workaround for Athlon/Opteron prefetch errata
>
>
> On Mon, 15 Sep 2003, Adrian Bunk wrote:
>
> > On Mon, Sep 15, 2003 at 07:32:49AM +0100, John Bradford wrote:
> > >...
> > > It should be possible, and straightforward, to compile a
> kernel which:
> > >
> > > 1. Supports, (I.E. has workarounds for), any combination of CPUs.
> > > E.G. a kernel which supports 386s, and Athlons _only_ would not
> > > need the F00F bug workaround. Currently '386' kernels
> include it,
> > > because '386' means 'support 386 and above processors'.
> > >
> > > 2. Has compiler optimisations for one particular CPU.
> > > E.G. the 386 and Athlon supporting kernel above could have
> > > alignment optimised for either 386 or Athlon.
> > >...
> >
> > That's the point where even I consider such a system to be
> too complex.
>
> How does it strike you to have these:
> - compile support for any CPU which doesn't break the target
> (including slow it in some serious way)
> - drop support for any CPU except the target
>
> It seems to me that this is what the vendors want (as general
> as possible)
> and the size limited users want (small is beautiful).
>
> Fitting the code to this model could be done gradually and
> hopefully with
> some macros to prevent too much ugly ifdef code.
>
> --
> bill davidsen <davidsen@tmr.com>
> CTO, TMR Associates, Inc
> Doing interesting things with little computers since 1979.
>
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