From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from DM5PR21CU001.outbound.protection.outlook.com (mail-centralusazon11011028.outbound.protection.outlook.com [52.101.62.28]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C6B553ECBC5 for ; Wed, 15 Apr 2026 16:49:20 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=fail smtp.client-ip=52.101.62.28 ARC-Seal:i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1776271771; cv=fail; b=Ivt5Tf0oGQqo9zp15/UTVxdhrGMqI++nqkD5XSDKG3T5gto84dxEWuptlfzZ+TN0QUIIXeueKU0QqRHYrO7HMnVx8L9YKOeiolr8Ax20n17eUKKGDhQJxiEtxQzIZ3fjtPumuuf/pMizBZjto720DoLArxgiLi0OpFVWfSVHpGA= ARC-Message-Signature:i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1776271771; c=relaxed/simple; bh=9fjNtbmXy4zOzFKICOwbsHevULL5dMPLLMhywkdfl1I=; h=Message-ID:Date:MIME-Version:Subject:To:CC:References:From: In-Reply-To:Content-Type; b=TvFg/rJPFnle+xBC9k3ejd8HHuiVKidI61eWUt4rlvfJBq9ieJggTowtgDMOrbYoidHaTJbs6SfPdbsT6svC5nuNZCN66nuPr9jdOapVF2j54k6iHdhD3b/4fEtWKjlYlc2CnUKIswchPAw1Of890KoSQm9WUZZ/a5wUi03j+LY= ARC-Authentication-Results:i=2; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=amd.com; spf=fail smtp.mailfrom=amd.com; dkim=pass (1024-bit key) header.d=amd.com header.i=@amd.com header.b=VFyWAyX0; arc=fail smtp.client-ip=52.101.62.28 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=amd.com Authentication-Results: smtp.subspace.kernel.org; spf=fail smtp.mailfrom=amd.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=amd.com header.i=@amd.com header.b="VFyWAyX0" ARC-Seal: i=1; a=rsa-sha256; s=arcselector10001; d=microsoft.com; cv=none; b=FlY/pYp3thh9S9BVgtl2cgLxBteDAEHFQdRMkduyv+Usoil7C6tk2KKjzmZ5SfhYqfjrx+XYEKxHcmHUStGdGpQcW75U9gVLiGjFutMwzWNty3aRWqTuHa9SokVu7h9kIMF43KPXWJIseWesL/paFNFXFabWW5gQb0FtrYjvc0K4xrPLwbHZxyQ2ZlZ3lbvVy8vncCoyxb3xHpMMFHe7yvV7W5lje5OD2Z/dxg+6hrXcwu1UlIzoY1WjASF/I3+v9Ki7ijfGHwtT3VMxir9JPPJ9677b6XNXfq+yT2msDc+u+F6Ws1aoRrtDxMiMMA2n2rPGSlyuS4lWINQjX7SaHQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector10001; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=84powt232wuifTARglJ2U7LTATWLLDiHKX+AG9cfqes=; b=X0HH4uVs/z4Jzo5CgEnyceo5rDtccHvmRpoHcE/GkjtSR9zlGodJKlu2aXMOZDoK43QGrB+hZGLiSOk1wrtjVnOoCmN5pBC/JAQDlcG9WsOoGqxNi/LXkxt3TVH8KXqO0Sy1PMX0/Z8NyAl6yEOwttDjp8pCPdfXaO1DTWjj73TtbEjXIULA2hIf1VCnH7MZ3/vyBDV0ZBudSfZhQNhgeqPOQevHiYv1hUq2YBPHj6LSsVg5nv6FvyjMo5RjcU4SGL3EBQ0/hakFk0e7TsVNikjSII174V8TWUSeg5zPNdgX36xkZYEV+c4Q/w84j60+WKa6WHUgiRwnZz1zvN0rAg== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass (sender ip is 165.204.84.17) smtp.rcpttodomain=kernel.org smtp.mailfrom=amd.com; dmarc=pass (p=quarantine sp=quarantine pct=100) action=none header.from=amd.com; dkim=none (message not signed); arc=none (0) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amd.com; s=selector1; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=84powt232wuifTARglJ2U7LTATWLLDiHKX+AG9cfqes=; b=VFyWAyX023lfo79p0SRJXBcyJP+UI0adfd9pjateexbR932qff0cORXCElHISyBg6J0P+3CYG1fgEOz7q75tFrchfLp1T6z5qPGi6wtljKm/87Kcyoc3iot/qspIn3fdvAUGVr13vfJknvKTFSfiToqSRmVBlVZ6yWKrd44ldAY= Received: from BN1PR14CA0020.namprd14.prod.outlook.com (2603:10b6:408:e3::25) by IA1PR12MB8261.namprd12.prod.outlook.com (2603:10b6:208:3f7::7) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.9818.21; Wed, 15 Apr 2026 16:49:15 +0000 Received: from BN3PEPF0000B370.namprd21.prod.outlook.com (2603:10b6:408:e3:cafe::e4) by BN1PR14CA0020.outlook.office365.com (2603:10b6:408:e3::25) with Microsoft SMTP Server (version=TLS1_3, cipher=TLS_AES_256_GCM_SHA384) id 15.20.9769.48 via Frontend Transport; Wed, 15 Apr 2026 16:49:15 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 165.204.84.17) smtp.mailfrom=amd.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=amd.com; Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=satlexmb08.amd.com; pr=C Received: from satlexmb08.amd.com (165.204.84.17) by BN3PEPF0000B370.mail.protection.outlook.com (10.167.243.167) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.9846.0 via Frontend Transport; Wed, 15 Apr 2026 16:49:15 +0000 Received: from SATLEXMB03.amd.com (10.181.40.144) by satlexmb08.amd.com (10.181.42.217) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.2.2562.17; Wed, 15 Apr 2026 11:49:14 -0500 Received: from satlexmb07.amd.com (10.181.42.216) by SATLEXMB03.amd.com (10.181.40.144) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.39; Wed, 15 Apr 2026 11:49:14 -0500 Received: from [172.19.71.207] (10.180.168.240) by satlexmb07.amd.com (10.181.42.216) with Microsoft SMTP Server id 15.2.2562.17 via Frontend Transport; Wed, 15 Apr 2026 11:49:13 -0500 Message-ID: Date: Wed, 15 Apr 2026 09:49:13 -0700 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:91.0) Gecko/20100101 Thunderbird/91.11.0 Subject: Re: [PATCH V1] accel/amdxdna: Add hardware scheduler time quantum support Content-Language: en-US To: Mario Limonciello , , , , , CC: Max Zhen , , References: <20260414165602.788811-1-lizhi.hou@amd.com> <54e62560-22a8-7f1b-642e-21042fc1f081@amd.com> <295f2c5c-1c16-96ab-b9b7-c465cc6ee16e@amd.com> <1be1c328-f807-45a7-9b54-a265c627e890@amd.com> From: Lizhi Hou In-Reply-To: <1be1c328-f807-45a7-9b54-a265c627e890@amd.com> Content-Type: text/plain; charset="UTF-8"; format=flowed Content-Transfer-Encoding: 8bit Received-SPF: None (SATLEXMB03.amd.com: lizhi.hou@amd.com does not designate permitted sender hosts) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BN3PEPF0000B370:EE_|IA1PR12MB8261:EE_ X-MS-Office365-Filtering-Correlation-Id: 44bbbbb8-8868-4072-8819-08de9b0eedbd X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|36860700016|1800799024|82310400026|376014|56012099003|18002099003|22082099003; X-Microsoft-Antispam-Message-Info: vxXNBmszLVRjehFPYdD7IUTaJgeJHGOHZW7qmM0XLz285mBo9eaE+lWPDkHitcweeJY76jwUi/CZsF+gDbAgk5nXsmgafi5pJN+4OzVw6KDWM4U390oPZVInCjJ1+rqoMUBnKzfFky6jP+HOQD1iTu8JPJfvwS6U6cLXNAFEDnOjakIzINallL4HDTiUQuE01uNRODBh7C3DlpGNX+5e3GGJnqYOLwpxf8OCWqxa0A7945dtNklSDfuaaeS7noJCMY8UPlmP2VhfiwTpSpppV21bi5rUzyPqFcT7bv8KlGXB+9+3XSiRH3/RneLTxoWgJGjBGWabzCoqAU9Mdsob6a6qaDf43rgN55y7DYvc5+ox8tDQoXIK+1y0/Q4c06t466j+RDN3ALJNAMUfZMw0sWpMaCJAwCWQsonIeCL4Wilf+lmj0SIGKjCxjkhbKoZxv9uvDnX3VrqUlIhJwsp+LZoY+YaqgUpy3CxvmNk1LHMbLIYCYDlv6xHFQt+HkIffgfVNAofCeHNWkoifMWcHtXCognzgU3+/Pa4lkTB7DNGT6FKDzcoJS2t/gsJaxb6n9bzI2y2h108HHHl8lIV3JJAMO1hw2xCq5pcJ+EIcP6GZeUTJ1ZHXA85htUSZESep7LMElqYunEAPELxV4dKWj1EU8pFfbINz+AJQplMrYRWYZG6Cup1XK7E4cLzX/wp2EGgcdf8XkFpmsv3zdY7BlSGUMfjAXk8hY6P1L+cg3h8TPW4I4b23kgOl1C9ahkFPMa4pMIK5BdIJ78qZfXIDFaQohwgZ0Av2MiahDwVsib4= X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:satlexmb08.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230040)(36860700016)(1800799024)(82310400026)(376014)(56012099003)(18002099003)(22082099003);DIR:OUT;SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: zRN54S6xPAXan/dW9BmLUi0b5T/SABUo2e19dyD/3dUIysOV1L4h3DVmi7nbGnUWD6TjRsBo81p8kSbaLvgbJN+xoiVG8MJYSXJm7Hoeqds04+R/rHgy6+y/KciNh5zMo3vn1TarIb6Ua94ken2EfxQWGzGsxBT1a5UmGOSsw9KD/jvt/PSl079jyHvL593trFtqwMYIJ382aExcNVdAfb8mEeQLVb0Dn0ZQ2aW9CRiRXGkbKnzDRzY15klSipfmqZs77QUCXqLHwMyTkmAVr67fPzAaiX2jGL6QB9w+sydHY6qyQnufaetsW0daJ4OlpPncakGtk8M1vL2zfBoNQb6aJdFyzu+a2ysLhjJLYeTV6WsiatYbe4eGkVGchZPru/WfyKvKsXTJRMnS8tDLnd+wcJfX2uOYZqsyH1TMygzWcFldN7FB0PZ555XOSJj1 X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 15 Apr 2026 16:49:15.3217 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 44bbbbb8-8868-4072-8819-08de9b0eedbd X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb08.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BN3PEPF0000B370.namprd21.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: IA1PR12MB8261 On 4/14/26 10:32, Mario Limonciello wrote: > > > On 4/14/26 12:28, Lizhi Hou wrote: >> >> On 4/14/26 10:17, Mario Limonciello wrote: >>> >>> >>> On 4/14/26 12:16, Lizhi Hou wrote: >>>> >>>> On 4/14/26 09:58, Mario Limonciello wrote: >>>>> >>>>> >>>>> On 4/14/26 11:56, Lizhi Hou wrote: >>>>>> From: Max Zhen >>>>>> >>>>>> Add support for configuring the hardware scheduler time quantum to >>>>>> improve fairness across concurrent contexts. >>>>>> >>>>>> The scheduler enforces a fixed time slice per context, preventing >>>>>> long-running workloads from monopolizing the device and allowing >>>>>> other contexts to make forward progress. >>>>>> >>>>>> The default time quantum is 30ms and can be configured via the >>>>>> time_quantum_ms module parameter. >>>>> >>>>> Can you talk more about how you want to use it?  Adding new module >>>>> parameters is generally frowned upon in lieu of doing something >>>>> with debugfs at runtime. >>>> >>>> This is a static setting which is not supposed to change at >>>> runtime. So module parameter is used. >>> >>> But so what happens if user loads driver with default setting and >>> then unloads driver and loads with a different setting as module >>> option? >>> >>> Does this flow fall apart because the driver initially programmed 30ms? >> >> Reloading with new setting will overwrite the default setting. After >> the module is loaded, it is not supposed to change before unloading >> the module. >> > > + Greg > > Greg, > > How do you feel about a module parameter for this purpose?  Any other > suggestions if you don't like it? > > I was thinking a debugfs file still makes sense, but either the > debugfs file can do unbind/rebind internally or user using debugfs > file can do the unbind/bind sequence in sysfs after touching the > debugfs file. > > Here is full thread in case you don't have: > > https://lore.kernel.org/dri-devel/20260414165602.788811-1-lizhi.hou@amd.com/ > After discussing, I will remove the module parameter and always use default 30ms for now. Lizhi > >> >> Lizhi >> >>> >>>> >>>> Lizhi >>>> >>>>> >>>>> IE if you can export it as a debugfs file that when you write to >>>>> it updates the quantum or updates it and restarts the driver this >>>>> might be more preferable. >>>>> >>>>>> >>>>>> Signed-off-by: Max Zhen >>>>>> Signed-off-by: Lizhi Hou >>>>>> --- >>>>>>   drivers/accel/amdxdna/aie2_message.c  | 44 >>>>>> ++++++++++++++++++++++ +++++ >>>>>>   drivers/accel/amdxdna/aie2_msg_priv.h | 16 ++++++++++ >>>>>>   drivers/accel/amdxdna/aie2_pci.c      | 16 ++++++++++ >>>>>>   drivers/accel/amdxdna/aie2_pci.h      |  2 ++ >>>>>>   drivers/accel/amdxdna/npu4_regs.c     |  3 +- >>>>>>   5 files changed, 80 insertions(+), 1 deletion(-) >>>>>> >>>>>> diff --git a/drivers/accel/amdxdna/aie2_message.c >>>>>> b/drivers/accel/ amdxdna/aie2_message.c >>>>>> index e52dc7ea9fc7..976ad6281078 100644 >>>>>> --- a/drivers/accel/amdxdna/aie2_message.c >>>>>> +++ b/drivers/accel/amdxdna/aie2_message.c >>>>>> @@ -1200,3 +1200,47 @@ int aie2_query_app_health(struct >>>>>> amdxdna_dev_hdl *ndev, u32 context_id, >>>>>>       aie2_free_msg_buffer(ndev, buf_size, buf, dma_addr); >>>>>>       return ret; >>>>>>   } >>>>>> + >>>>>> +static int >>>>>> +aie2_runtime_update_ctx_prop(struct amdxdna_dev_hdl *ndev, >>>>>> +                 struct amdxdna_hwctx *ctx, u32 type, u32 value) >>>>>> +{ >>>>>> +    DECLARE_AIE_MSG(update_property, MSG_OP_UPDATE_PROPERTY); >>>>>> +    struct amdxdna_dev *xdna = ndev->aie.xdna; >>>>>> +    int ret; >>>>>> + >>>>>> +    if (!AIE_FEATURE_ON(&ndev->aie, AIE2_UPDATE_PROPERTY)) >>>>>> +        return -EOPNOTSUPP; >>>>>> + >>>>>> +    if (ctx) >>>>>> +        req.context_id = ctx->fw_ctx_id; >>>>>> +    else >>>>>> +        req.context_id = AIE2_UPDATE_PROPERTY_ALL_CTX; >>>>>> + >>>>>> +    req.time_quota_us = value; >>>>>> +    req.type = type; >>>>>> + >>>>>> +    ret = aie_send_mgmt_msg_wait(&ndev->aie, &msg); >>>>>> +    if (ret) { >>>>>> +        XDNA_ERR(xdna, "%s update property failed, type %d ret %d", >>>>>> +             ctx ? ctx->name : "ctx.all", type, ret); >>>>>> +        return ret; >>>>>> +    } >>>>>> + >>>>>> +    return 0; >>>>>> +} >>>>>> + >>>>>> +int aie2_update_prop_time_quota(struct amdxdna_dev_hdl *ndev, >>>>>> u32 us) >>>>>> +{ >>>>>> +    struct amdxdna_dev *xdna = ndev->aie.xdna; >>>>>> +    int ret; >>>>>> + >>>>>> +    ret = aie2_runtime_update_ctx_prop(ndev, NULL, >>>>>> UPDATE_PROPERTY_TIME_QUOTA, us); >>>>>> +    if (ret == -EOPNOTSUPP) { >>>>>> +        XDNA_DBG(xdna, "update time quota not support, skipped"); >>>>>> +        ret = 0; >>>>>> +    } else if (!ret) { >>>>>> +        XDNA_DBG(xdna, "Ctx exec time quantum updated to %u us", >>>>>> us); >>>>>> +    } >>>>>> +    return ret; >>>>>> +} >>>>>> diff --git a/drivers/accel/amdxdna/aie2_msg_priv.h >>>>>> b/drivers/accel/ amdxdna/aie2_msg_priv.h >>>>>> index f18e89a39e35..fc2e99510980 100644 >>>>>> --- a/drivers/accel/amdxdna/aie2_msg_priv.h >>>>>> +++ b/drivers/accel/amdxdna/aie2_msg_priv.h >>>>>> @@ -31,6 +31,7 @@ enum aie2_msg_opcode { >>>>>>       MSG_OP_SET_RUNTIME_CONFIG          = 0x10A, >>>>>>       MSG_OP_GET_RUNTIME_CONFIG          = 0x10B, >>>>>>       MSG_OP_REGISTER_ASYNC_EVENT_MSG    = 0x10C, >>>>>> +    MSG_OP_UPDATE_PROPERTY             = 0x113, >>>>>>       MSG_OP_GET_APP_HEALTH              = 0x114, >>>>>>       MSG_OP_MAX_DRV_OPCODE, >>>>>>       MSG_OP_GET_PROTOCOL_VERSION        = 0x301, >>>>>> @@ -503,4 +504,19 @@ struct get_app_health_resp { >>>>>>       __u32 required_buffer_size; >>>>>>       __u32 reserved[7]; >>>>>>   } __packed; >>>>>> + >>>>>> +struct update_property_req { >>>>>> +#define UPDATE_PROPERTY_TIME_QUOTA 0 >>>>>> +    __u32 type; >>>>>> +#define AIE2_UPDATE_PROPERTY_ALL_CTX    0xFF >>>>>> +    __u8 context_id; >>>>>> +    __u8 reserved[7]; >>>>>> +    __u32 time_quota_us; >>>>>> +    __u32 reserved1; >>>>>> +} __packed; >>>>>> + >>>>>> +struct update_property_resp { >>>>>> +    enum aie2_msg_status status; >>>>>> +} __packed; >>>>>> + >>>>>>   #endif /* _AIE2_MSG_PRIV_H_ */ >>>>>> diff --git a/drivers/accel/amdxdna/aie2_pci.c b/drivers/accel/ >>>>>> amdxdna/aie2_pci.c >>>>>> index c9c23c889c78..7ed99ea471a9 100644 >>>>>> --- a/drivers/accel/amdxdna/aie2_pci.c >>>>>> +++ b/drivers/accel/amdxdna/aie2_pci.c >>>>>> @@ -33,6 +33,11 @@ static int aie2_max_col = XRS_MAX_COL; >>>>>>   module_param(aie2_max_col, uint, 0600); >>>>>>   MODULE_PARM_DESC(aie2_max_col, "Maximum column could be used"); >>>>>>   +#define MAX_TIME_QUANTUM_MS 2000 /* milliseconds */ >>>>>> +static uint time_quantum_ms = 30; /* milliseconds */ >>>>>> +module_param(time_quantum_ms, uint, 0400); >>>>>> +MODULE_PARM_DESC(time_quantum_ms, "Execution time quantum. >>>>>> Default 30 ms, MAX 2000 ms"); >>>>>> + >>>>>>   static char *npu_fw[] = { >>>>>>       "npu_7.sbin", >>>>>>       "npu.sbin" >>>>>> @@ -186,6 +191,17 @@ static int aie2_mgmt_fw_init(struct >>>>>> amdxdna_dev_hdl *ndev) >>>>>>           return ret; >>>>>>       } >>>>>>   +    if (time_quantum_ms > MAX_TIME_QUANTUM_MS) { >>>>>> +        XDNA_ERR(ndev->aie.xdna, "Bad time quantum %u", >>>>>> time_quantum_ms); >>>>>> +        return -EINVAL; >>>>>> +    } >>>>>> + >>>>>> +    ret = aie2_update_prop_time_quota(ndev, time_quantum_ms * >>>>>> 1000); >>>>>> +    if (ret) { >>>>>> +        XDNA_ERR(ndev->aie.xdna, "Failed to update execution >>>>>> time quantum"); >>>>>> +        return ret; >>>>>> +    } >>>>>> + >>>>>>       ret = aie2_xdna_reset(ndev); >>>>>>       if (ret) { >>>>>>           XDNA_ERR(ndev->aie.xdna, "Reset firmware failed"); >>>>>> diff --git a/drivers/accel/amdxdna/aie2_pci.h b/drivers/accel/ >>>>>> amdxdna/aie2_pci.h >>>>>> index f83deca2b51a..69b53c7bcb86 100644 >>>>>> --- a/drivers/accel/amdxdna/aie2_pci.h >>>>>> +++ b/drivers/accel/amdxdna/aie2_pci.h >>>>>> @@ -222,6 +222,7 @@ enum aie2_fw_feature { >>>>>>       AIE2_PREEMPT, >>>>>>       AIE2_TEMPORAL_ONLY, >>>>>>       AIE2_APP_HEALTH, >>>>>> +    AIE2_UPDATE_PROPERTY, >>>>>>       AIE2_FEATURE_MAX >>>>>>   }; >>>>>>   @@ -308,6 +309,7 @@ int aie2_sync_bo(struct amdxdna_hwctx >>>>>> *hwctx, struct amdxdna_sched_job *job, >>>>>>            int (*notify_cb)(void *, void __iomem *, size_t)); >>>>>>   int aie2_config_debug_bo(struct amdxdna_hwctx *hwctx, struct >>>>>> amdxdna_sched_job *job, >>>>>>                int (*notify_cb)(void *, void __iomem *, size_t)); >>>>>> +int aie2_update_prop_time_quota(struct amdxdna_dev_hdl *ndev, >>>>>> u32 us); >>>>>>   void *aie2_alloc_msg_buffer(struct amdxdna_dev_hdl *ndev, u32 >>>>>> *size, >>>>>>                   dma_addr_t *dma_addr); >>>>>>   void aie2_free_msg_buffer(struct amdxdna_dev_hdl *ndev, size_t >>>>>> size, >>>>>> diff --git a/drivers/accel/amdxdna/npu4_regs.c b/drivers/accel/ >>>>>> amdxdna/npu4_regs.c >>>>>> index a3b6df56abd0..6ebf75ad5fb4 100644 >>>>>> --- a/drivers/accel/amdxdna/npu4_regs.c >>>>>> +++ b/drivers/accel/amdxdna/npu4_regs.c >>>>>> @@ -93,9 +93,10 @@ const struct dpm_clk_freq npu4_dpm_clk_table[] >>>>>> = { >>>>>>     const struct amdxdna_fw_feature_tbl npu4_fw_feature_table[] = { >>>>>>       { .major = 6, .min_minor = 12 }, >>>>>> -    { .features = BIT_U64(AIE2_NPU_COMMAND), .major = 6, >>>>>> .min_minor = 15 }, >>>>>>       { .features = BIT_U64(AIE2_PREEMPT), .major = 6, .min_minor >>>>>> = 12 }, >>>>>>       { .features = BIT_U64(AIE2_TEMPORAL_ONLY), .major = 6, >>>>>> .min_minor = 12 }, >>>>>> +    { .features = BIT_U64(AIE2_NPU_COMMAND), .major = 6, >>>>>> .min_minor = 15 }, >>>>>> +    { .features = BIT_U64(AIE2_UPDATE_PROPERTY), .major = 6, >>>>>> .min_minor = 15 }, >>>>>>       { .features = BIT_U64(AIE2_APP_HEALTH), .major = 6, >>>>>> .min_minor = 18 }, >>>>>>       { .features = AIE2_ALL_FEATURES, .major = 7 }, >>>>>>       { 0 } >>>>> >>> >