From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id C5A0E31ED86 for ; Fri, 19 Dec 2025 12:06:56 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1766146018; cv=none; b=a4IoNBdnZ7UDsWs5jegh81jq1g5Dhk9xnXP4o4+SdhpKH9A20MR1hlt9ZieGnRmoiE+Nhub4+6o1wdJ4ODqhkEqI1D4psdjQHy9kA03quIuFHNJ89vAMApSVEL7w1OvuMfqavo0DFyJyqslSPFsZ9Rm/nKfTJuheusmwebqwCAs= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1766146018; c=relaxed/simple; bh=D2hE04V3ufl2UxdK+1RN4JW28/Rd37I4cAAeDExCYG4=; h=Message-ID:Date:MIME-Version:Subject:To:Cc:References:From: In-Reply-To:Content-Type; b=ua+fAmRcfsZFVMRKyoT+jp0cn1O0YVWuIb37z0tFG6wB824fe4tpPXk4VE5UW+yJqBTGde1LTYdudjS28fhj2uZjPXxgMF/SBa93Rf40ycacu06Md+8aKDeZxrM/ieLvL/71tYDdGcJBFrIxyiXAQUNZ3pqbZ3BHsvYE2oWg0qM= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com; spf=pass smtp.mailfrom=arm.com; arc=none smtp.client-ip=217.140.110.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id E8795FEC; Fri, 19 Dec 2025 04:06:48 -0800 (PST) Received: from [10.1.196.46] (e134344.arm.com [10.1.196.46]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id BA7173F5CA; Fri, 19 Dec 2025 04:06:52 -0800 (PST) Message-ID: Date: Fri, 19 Dec 2025 12:06:51 +0000 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [RFC PATCH 18/38] arm_mpam: resctrl: Add support for csu counters To: Jonathan Cameron , James Morse Cc: linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, D Scott Phillips OS , carl@os.amperecomputing.com, lcherian@marvell.com, bobo.shaobowang@huawei.com, tan.shaopeng@fujitsu.com, baolin.wang@linux.alibaba.com, Jamie Iles , Xin Hao , peternewman@google.com, dfustini@baylibre.com, amitsinght@marvell.com, David Hildenbrand , Dave Martin , Koba Ko , Shanker Donthineni , fenghuay@nvidia.com, baisheng.gao@unisoc.com, Gavin Shan , rohit.mathew@arm.com, reinette.chatre@intel.com, Punit Agrawal References: <20251205215901.17772-1-james.morse@arm.com> <20251205215901.17772-19-james.morse@arm.com> <20251218132059.00001a0d@huawei.com> From: Ben Horgan Content-Language: en-US In-Reply-To: <20251218132059.00001a0d@huawei.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit Hi Jonathan, On 12/18/25 13:20, Jonathan Cameron wrote: > On Fri, 5 Dec 2025 21:58:41 +0000 > James Morse wrote: > >> resctrl exposes a counter via a file named llc_occupancy. This isn't really >> a counter as its value goes up and down, this is a snapshot of the cache >> storage usage monitor. >> >> Add some picking code to find a cache as close as possible to the L3 that >> supports the CSU monitor. >> >> If there is an L3, but it doesn't have any controls, force the L3 resource >> to exist. The existing topology_matches_l3() and >> mpam_resctrl_domain_hdr_init() code will ensure this looks like the L3, >> even if the class belongs to a later cache. >> >> Signed-off-by: James Morse > > More triviality from me. I'll take a separate look at whether this actually > works for all the systems we care about. It feels like maybe a top level > MPAM to resctl mapping document might be useful as people are going to fall > into traps around these various heuristics, particularly as more exciting > topologies arrive in the future. Seems sensible, this is one of the tricky things. > > >> diff --git a/drivers/resctrl/mpam_resctrl.c b/drivers/resctrl/mpam_resctrl.c >> index fe830524639e..fc1f054f187e 100644 >> --- a/drivers/resctrl/mpam_resctrl.c >> +++ b/drivers/resctrl/mpam_resctrl.c > >> /* >> * Calculate the worst-case percentage change from each implemented step >> * in the control. >> @@ -499,6 +531,64 @@ static void mpam_resctrl_pick_mba(void) >> } >> } >> >> +static void counter_update_class(enum resctrl_event_id evt_id, >> + struct mpam_class *class) >> +{ >> + struct mpam_class *existing_class = mpam_resctrl_counters[evt_id].class; >> + >> + if (existing_class) { >> + if (class->level == 3) { >> + pr_debug("Existing class is L3 - L3 wins\n"); >> + return; > > As returned the else isn't adding anything much. > >> + } else if (existing_class->level < class->level) { >> + pr_debug("Existing class is closer to L3, %u versus %u - closer is better\n", >> + existing_class->level, class->level); >> + return; >> + } >> + } >> + >> + mpam_resctrl_counters[evt_id].class = class; >> + exposed_mon_capable = true; >> +} > > Thanks, Ben