[PATCH v2] EDAC/ie31200: Add two more Intel Alder Lake-S SoCs for EDAC support

[PATCH v2] EDAC/ie31200: Add two more Intel Alder Lake-S SoCs for EDAC support

[Kyle Manna]

Host Device IDs (DID0) correspond to:
* Intel Core i7-12700K
* Intel Core i5-12600K

See documentation:
* 12th Generation Intel® Core™ Processors Datasheet
    * Volume 1 of 2, Doc. No.: 655258, Rev.: 011
    * https://edc.intel.com/output/DownloadPdfDocument?id=8297 (PDF)

Signed-off-by: Kyle Manna <kyle@kylemanna.com>
Reviewed-by: Qiuxu Zhuo <qiuxu.zhuo@intel.com>
---
Changes in v2:
- Rebased on top of a6923c06a3b2e2c534ae28c53a7531e76cc95cfa
- Added comments to Device ID definitions as requested
- Added Reviewed-by tag from Qiuxu Zhuo

 drivers/edac/ie31200_edac.c | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/drivers/edac/ie31200_edac.c b/drivers/edac/ie31200_edac.c
index 5c1fa1c0d12e..5a080ab65476 100644
--- a/drivers/edac/ie31200_edac.c
+++ b/drivers/edac/ie31200_edac.c
@@ -99,6 +99,8 @@
 
 /* Alder Lake-S */
 #define PCI_DEVICE_ID_INTEL_IE31200_ADL_S_1	0x4660
+#define PCI_DEVICE_ID_INTEL_IE31200_ADL_S_2	0x4668	/* 8P+4E, e.g. i7-12700K */
+#define PCI_DEVICE_ID_INTEL_IE31200_ADL_S_3	0x4648	/* 6P+4E, e.g. i5-12600K */
 
 /* Bartlett Lake-S */
 #define PCI_DEVICE_ID_INTEL_IE31200_BTL_S_1	0x4639
@@ -761,6 +763,8 @@ static const struct pci_device_id ie31200_pci_tbl[] = {
 	{ PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IE31200_RPL_S_6), (kernel_ulong_t)&rpl_s_cfg},
 	{ PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IE31200_RPL_HX_1), (kernel_ulong_t)&rpl_s_cfg},
 	{ PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IE31200_ADL_S_1), (kernel_ulong_t)&rpl_s_cfg},
+	{ PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IE31200_ADL_S_2), (kernel_ulong_t)&rpl_s_cfg},
+	{ PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IE31200_ADL_S_3), (kernel_ulong_t)&rpl_s_cfg},
 	{ PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IE31200_BTL_S_1), (kernel_ulong_t)&rpl_s_cfg},
 	{ PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IE31200_BTL_S_2), (kernel_ulong_t)&rpl_s_cfg},
 	{ PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IE31200_BTL_S_3), (kernel_ulong_t)&rpl_s_cfg},
-- 
2.50.1

Re: [PATCH v2] EDAC/ie31200: Add two more Intel Alder Lake-S SoCs for EDAC support

[Kyle Manna]

On Fri, Aug 1, 2025, at 23:01, Kyle Manna wrote:
> Host Device IDs (DID0) correspond to:
> * Intel Core i7-12700K
> * Intel Core i5-12600K
>
> See documentation:
> * 12th Generation Intel® Core™ Processors Datasheet
>     * Volume 1 of 2, Doc. No.: 655258, Rev.: 011
>     * https://edc.intel.com/output/DownloadPdfDocument?id=8297 (PDF)
>
> Signed-off-by: Kyle Manna <kyle@kylemanna.com>
> Reviewed-by: Qiuxu Zhuo <qiuxu.zhuo@intel.com>
> ---
> Changes in v2:
> - Rebased on top of a6923c06a3b2e2c534ae28c53a7531e76cc95cfa
> - Added comments to Device ID definitions as requested
> - Added Reviewed-by tag from Qiuxu Zhuo
>
>  drivers/edac/ie31200_edac.c | 4 ++++
>  1 file changed, 4 insertions(+)

Hi Tony, Jason,

Gentle ping on this small EDAC/ie31200 change that adds two more Alder Lake-S device IDs for ECC-capable part.

Reviewed-by: Qiuxu Zhuo <qiuxu.zhuo@intel.com>

Could you please pick this up for the EDAC tree (ras edac-for-next)?

Thanks,
- Kyle

Re: [PATCH v2] EDAC/ie31200: Add two more Intel Alder Lake-S SoCs for EDAC support

[howtobserve1]

Hi All,

Confirmation EDAC works on 8P+4E (DID 0x4668) configuration as well, using ECC DDR4 UDIMM sticks. Validated on i7 12700 and Kingston 2666MHz ECC RAM.

Raw logs:
~ > sudo dmesg | grep -i -e edac -e ecc -e ie31200 | grep -v systemd | grep edac
[    7.834839] caller ie31200_init_one+0x1b5/0x480 [ie31200_edac] mapping multiple BARs
[    7.839585] EDAC MC0: Giving out device to module ie31200_edac controller IE31200: DEV 0000:00:00.0 (INTERRUPT)
[    7.843230] EDAC MC1: Giving out device to module ie31200_edac controller IE31200_1: DEV 0000:00:00.0 (INTERRUPT)

~ > grep . /sys/devices/system/edac/mc/mc*/*_count
/sys/devices/system/edac/mc/mc0/ce_count:0
/sys/devices/system/edac/mc/mc0/ce_noinfo_count:0
/sys/devices/system/edac/mc/mc0/ue_count:0
/sys/devices/system/edac/mc/mc0/ue_noinfo_count:0
/sys/devices/system/edac/mc/mc1/ce_count:0
/sys/devices/system/edac/mc/mc1/ce_noinfo_count:0
/sys/devices/system/edac/mc/mc1/ue_count:0
/sys/devices/system/edac/mc/mc1/ue_noinfo_count:0

~ > ras-mc-ctl --error-count
Label                   CE      UE
mc#1csrow#1channel#0    0       0
mc#1csrow#0channel#0    0       0
mc#0csrow#0channel#0    0       0
mc#0csrow#1channel#0    0       0

~ > ras-mc-ctl --status
ras-mc-ctl: drivers are loaded.

~ > ras-mc-ctl --mainboard
ras-mc-ctl: mainboard: DFI Inc. model ADS310

~ > lscpu
Architecture:                x86_64
  CPU op-mode(s):            32-bit, 64-bit
  Address sizes:             46 bits physical, 48 bits virtual
  Byte Order:                Little Endian
CPU(s):                      20
  On-line CPU(s) list:       0-19
Vendor ID:                   GenuineIntel
  Model name:                12th Gen Intel(R) Core(TM) i7-12700
    CPU family:              6
    Model:                   151
    Thread(s) per core:      2
    Core(s) per socket:      12
    Socket(s):               1
    Stepping:                2
    CPU(s) scaling MHz:      22%
    CPU max MHz:             4900.0000
    CPU min MHz:             800.0000
    BogoMIPS:                4225.00

Thanks
Aug 12, 2025, 00:19 by kyle@kylemanna.com:

> On Fri, Aug 1, 2025, at 23:01, Kyle Manna wrote:
>
>> Host Device IDs (DID0) correspond to:
>> * Intel Core i7-12700K
>> * Intel Core i5-12600K
>>
>> See documentation:
>> * 12th Generation Intel® Core™ Processors Datasheet
>>  * Volume 1 of 2, Doc. No.: 655258, Rev.: 011
>>  * https://edc.intel.com/output/DownloadPdfDocument?id=8297 (PDF)
>>
>> Signed-off-by: Kyle Manna <kyle@kylemanna.com>
>> Reviewed-by: Qiuxu Zhuo <qiuxu.zhuo@intel.com>
>> ---
>> Changes in v2:
>> - Rebased on top of a6923c06a3b2e2c534ae28c53a7531e76cc95cfa
>> - Added comments to Device ID definitions as requested
>> - Added Reviewed-by tag from Qiuxu Zhuo
>>
>>  drivers/edac/ie31200_edac.c | 4 ++++
>>  1 file changed, 4 insertions(+)
>>
>
> Hi Tony, Jason,
>
> Gentle ping on this small EDAC/ie31200 change that adds two more Alder Lake-S device IDs for ECC-capable part.
>
> Reviewed-by: Qiuxu Zhuo <qiuxu.zhuo@intel.com>
>
> Could you please pick this up for the EDAC tree (ras edac-for-next)?
>
> Thanks,
> - Kyle
>