From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.6 required=3.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH, MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED, USER_AGENT_SANE_1 autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id EF584C433E0 for ; Wed, 24 Jun 2020 22:09:32 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id CCECA2084D for ; Wed, 24 Jun 2020 22:09:32 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b="dew2+X+x" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2389997AbgFXWJb (ORCPT ); Wed, 24 Jun 2020 18:09:31 -0400 Received: from fllv0015.ext.ti.com ([198.47.19.141]:39380 "EHLO fllv0015.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2387853AbgFXWJ3 (ORCPT ); Wed, 24 Jun 2020 18:09:29 -0400 Received: from lelv0265.itg.ti.com ([10.180.67.224]) by fllv0015.ext.ti.com (8.15.2/8.15.2) with ESMTP id 05OM8bQG066351; Wed, 24 Jun 2020 17:08:37 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1593036517; bh=8pxGcSuDGHL5/biPmNuRMj2l3xMNTG6V1WBrzq8DbV8=; h=Subject:To:CC:References:From:Date:In-Reply-To; b=dew2+X+xSol3YYZIrkXvLmNttcwE1ukDAiVHz+Vo+ZzGEQpzssCP2gBtVQcMplq3b ky9x5liGGAsvAOJtzc+3uop7JlYH0bsBpkeOe/thg+jtwRzT9POJVMmKAj/HQsf+M0 5l06R3bRbEpFuvwwt1xYrGfe4dKfkyKAgFpWJWkY= Received: from DLEE102.ent.ti.com (dlee102.ent.ti.com [157.170.170.32]) by lelv0265.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 05OM8bUj052317 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Wed, 24 Jun 2020 17:08:37 -0500 Received: from DLEE110.ent.ti.com (157.170.170.21) by DLEE102.ent.ti.com (157.170.170.32) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1979.3; Wed, 24 Jun 2020 17:08:37 -0500 Received: from lelv0326.itg.ti.com (10.180.67.84) by DLEE110.ent.ti.com (157.170.170.21) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1979.3 via Frontend Transport; Wed, 24 Jun 2020 17:08:37 -0500 Received: from [10.250.52.63] (ileax41-snat.itg.ti.com [10.172.224.153]) by lelv0326.itg.ti.com (8.15.2/8.15.2) with ESMTP id 05OM8bgi092136; Wed, 24 Jun 2020 17:08:37 -0500 Subject: Re: [PATCH v6 4/7] ASoC: tas2562: Add rx and tx slot programming To: , , , CC: , , , References: <20200624174932.9604-1-dmurphy@ti.com> <20200624174932.9604-5-dmurphy@ti.com> From: Dan Murphy Message-ID: Date: Wed, 24 Jun 2020 17:08:32 -0500 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.8.0 MIME-Version: 1.0 In-Reply-To: <20200624174932.9604-5-dmurphy@ti.com> Content-Type: text/plain; charset="utf-8"; format=flowed Content-Transfer-Encoding: 7bit Content-Language: en-US X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hello On 6/24/20 12:49 PM, Dan Murphy wrote: > Add programming for the tdm slots for both tx and rx offsets. > > Signed-off-by: Dan Murphy > --- > sound/soc/codecs/tas2562.c | 17 ++++++++++++++++- > sound/soc/codecs/tas2562.h | 4 ++++ > 2 files changed, 20 insertions(+), 1 deletion(-) > > diff --git a/sound/soc/codecs/tas2562.c b/sound/soc/codecs/tas2562.c > index d26e30a2948c..2f1d4b697f01 100644 > --- a/sound/soc/codecs/tas2562.c > +++ b/sound/soc/codecs/tas2562.c > @@ -208,6 +208,22 @@ static int tas2562_set_dai_tdm_slot(struct snd_soc_dai *dai, > if (ret < 0) > return ret; > > + if (tx_mask > TAS2562_TX_OFF_MAX) { > + dev_err(tas2562->dev, "TX slot is larger then %d", > + TAS2562_TX_OFF_MAX); > + return -EINVAL; > + } > + > + ret = snd_soc_component_update_bits(component, TAS2562_TDM_CFG1, > + TAS2562_RX_OFF_MASK, rx_mask << 1); > + if (ret < 0) > + return ret; > + > + ret = snd_soc_component_update_bits(component, TAS2562_TDM_CFG4, > + TAS2562_TX_OFF_MASK, tx_mask << 1); > + if (ret < 0) > + return ret; > + I need to fix this patch to remove the slot programming during dai_fmt as the code is not correct and resets the slots Dan