From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-1.0 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,SPF_PASS autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3DFCDC43441 for ; Mon, 26 Nov 2018 18:35:43 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 0061D20865 for ; Mon, 26 Nov 2018 18:35:42 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 0061D20865 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=linux.intel.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726659AbeK0Faj (ORCPT ); Tue, 27 Nov 2018 00:30:39 -0500 Received: from mga02.intel.com ([134.134.136.20]:6802 "EHLO mga02.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725747AbeK0Fai (ORCPT ); Tue, 27 Nov 2018 00:30:38 -0500 X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga005.fm.intel.com ([10.253.24.32]) by orsmga101.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 26 Nov 2018 10:35:40 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.56,283,1539673200"; d="scan'208";a="283817257" Received: from schen9-desk.jf.intel.com (HELO [10.54.74.144]) ([10.54.74.144]) by fmsmga005.fm.intel.com with ESMTP; 26 Nov 2018 10:35:39 -0800 To: Ingo Molnar , Thomas Gleixner Cc: LKML , x86@kernel.org, Peter Zijlstra , Andy Lutomirski , Linus Torvalds , Jiri Kosina , Tom Lendacky , Josh Poimboeuf , Andrea Arcangeli , David Woodhouse , Andi Kleen , Dave Hansen , Casey Schaufler , Asit Mallick , Arjan van de Ven , Jon Masters , Waiman Long , Greg KH , Dave Stewart , Kees Cook References: <20181121201430.559770965@linutronix.de> <20181121201724.227260385@linutronix.de> <20181123073735.GA12959@gmail.com> From: Tim Chen Openpgp: preference=signencrypt Autocrypt: addr=tim.c.chen@linux.intel.com; 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Linux x86_64; rv:52.0) Gecko/20100101 Thunderbird/52.1.0 MIME-Version: 1.0 In-Reply-To: <20181123073735.GA12959@gmail.com> Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 11/22/2018 11:37 PM, Ingo Molnar wrote: >>> I think all the call paths from prctl and seccomp coming here >>> has tsk == current. >> >> We had that discussion before with SSBD: >> >> seccomp_set_mode_filter() >> seccomp_attach_filter() >> seccomp_sync_threads() >> for_each_thread(t) >> if (t == current) >> continue; >> seccomp_assign_mode(t) >> arch_seccomp_spec_mitigate(t); >> >> seccomp_assign_mode(current...) >> arch_seccomp_spec_mitigate(); >> >>> But if task_update_spec_tif gets used in the future where tsk is running >>> on a remote CPU, this could lead to the MSR getting out of sync with the >>> running task's TIF flag. This will break either performance or security. >> >> We also had that discussion with SSBD and decided that we won't chase >> threads and send IPIs around. Yes, it's not perfect, but not the end of the >> world either. For PRCTL it's a non issue. Looks like seccomp thread can be running on a remote CPU when its TIF_SPEC_IB flag gets updated. I wonder if this will cause STIBP to be always off in this scenario, when two tasks with SPEC_IB flags running on a remote CPU have STIBP bit always *off* in SPEC MSR. Let's say we have tasks A and B running on a remote CPU: task A: SPEC_IB flag is on task B: SPEC_IB flag is off but is currently running on remote CPU, SPEC MSR's STIBP bit is off Now arch_seccomp_spec_mitigation is called, setting SPEC_IB flag on task B. SPEC MSR becomes out of sync with running task B's SPEC_IB flag. Task B context switches to task A. Because both tasks have SPEC_IB flag set and the flag status is unchanged, SPEC MSR's STIBP bit is not updated. SPEC MSR STIBP bit remains off if tasks A and B are the only tasks running on the CPU. There is an equivalent scenario where the SPEC MSR's STIBP bit remains on even though both running task A and B's SPEC_IB flags are turned off. Wonder if I may be missing something so the above scenario is not of concern? Thanks. Tim > > Fair enough and agreed - but please add a comment for all this, as it's a > non-trivial and rare call context and a non-trivial implementation > trade-off as a result. >