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From: Prasad Malisetty <pmaliset@codeaurora.org>
To: Bjorn Helgaas <helgaas@kernel.org>
Cc: agross@kernel.org, bjorn.andersson@linaro.org,
	bhelgaas@google.com, robh+dt@kernel.org, swboyd@chromium.org,
	lorenzo.pieralisi@arm.com, svarbanov@mm-sol.com,
	devicetree@vger.kernel.org, linux-arm-msm@vger.kernel.org,
	linux-usb@vger.kernel.org, linux-kernel@vger.kernel.org,
	dianders@chromium.org, mka@chromium.org, vbadigan@codeaurora.org,
	sallenki@codeaurora.org, manivannan.sadhasivam@linaro.org
Subject: Re: [PATCH v7 4/4] PCI: qcom: Switch pcie_1_pipe_clk_src after PHY init in SC7280
Date: Wed, 15 Sep 2021 12:53:41 +0530	[thread overview]
Message-ID: <c63b7811ad74303fbb80dbbfe2d11a17@codeaurora.org> (raw)
In-Reply-To: <20210914185228.GA1443558@bjorn-Precision-5520>

On 2021-09-15 00:22, Bjorn Helgaas wrote:
> On Tue, Sep 14, 2021 at 11:49:10PM +0530, Prasad Malisetty wrote:
>> On the SC7280, the clock source for gcc_pcie_1_pipe_clk_src
>> must be the TCXO while gdsc is enabled. After PHY init successful
>> clock source should switch to pipe clock for gcc_pcie_1_pipe_clk_src.
>> 
>> Signed-off-by: Prasad Malisetty <pmaliset@codeaurora.org>
>> ---
>>  drivers/pci/controller/dwc/pcie-qcom.c | 90 
>> +++++++++++++++++++++++++++++-----
>>  1 file changed, 79 insertions(+), 11 deletions(-)
>> 
>> +struct qcom_pcie_cfg {
>> +	const struct qcom_pcie_ops *ops;
>> +	bool pcie_1_pipe_clk_src_switch;
> 
> This is OK, but all things being equal I like "unsigned int x:1" a
> little better.  Here's some background:
> 
> 
Hi Bjorn,

Thanks for sharing the details.

Sure, I will replace bool with unsigned int in next patch version.

Thanks
-Prasad

> https://lore.kernel.org/r/CA+55aFzKQ6Pj18TB8p4Yr0M4t+S+BsiHH=BJNmn=76-NcjTj-g@mail.gmail.com/
> 
> https://lore.kernel.org/r/CA+55aFxnePDimkVKVtv3gNmRGcwc8KQ5mHYvUxY8sAQg6yvVYg@mail.gmail.com/
> 
>> @@ -1467,6 +1531,7 @@ static int qcom_pcie_probe(struct 
>> platform_device *pdev)
>>  	struct pcie_port *pp;
>>  	struct dw_pcie *pci;
>>  	struct qcom_pcie *pcie;
>> +	const struct qcom_pcie_cfg *pcie_cfg = NULL;
> 
> No need to initialize this, since you always assign it before using
> it.
> 
Agree, I will remove initialization in next patch series.

>>  	int ret;
>> 
>>  	pcie = devm_kzalloc(dev, sizeof(*pcie), GFP_KERNEL);
>> @@ -1488,7 +1553,9 @@ static int qcom_pcie_probe(struct 
>> platform_device *pdev)
>> 
>>  	pcie->pci = pci;
>> 
>> -	pcie->ops = of_device_get_match_data(dev);
>> +	pcie_cfg = of_device_get_match_data(dev);
>> +	pcie->ops = pcie_cfg->ops;
>> +	pcie->pcie_1_pipe_clk_src_switch = 
>> pcie_cfg->pcie_1_pipe_clk_src_switch;
>> 
>>  	pcie->reset = devm_gpiod_get_optional(dev, "perst", GPIOD_OUT_HIGH);
>>  	if (IS_ERR(pcie->reset)) {
> 
> Looks good, thanks for working on this!

Thanks Bjorn for the review.

  reply	other threads:[~2021-09-15  7:24 UTC|newest]

Thread overview: 12+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-09-14 18:19 [PATCH v7 0/4] Add DT bindings and DT nodes for PCIe and PHY in SC7280 Prasad Malisetty
2021-09-14 18:19 ` [PATCH v7 1/4] dt-bindings: pci: qcom: Document PCIe bindings for SC7280 Prasad Malisetty
2021-09-14 18:19 ` [PATCH v7 2/4] arm64: dts: qcom: sc7280: Add PCIe and PHY related nodes Prasad Malisetty
2021-09-14 19:19   ` Stephen Boyd
2021-09-14 18:19 ` [PATCH v7 3/4] arm64: dts: qcom: sc7280: Add PCIe nodes for IDP board Prasad Malisetty
2021-09-15  1:13   ` Stephen Boyd
2021-09-15  2:24     ` Bjorn Andersson
2021-09-14 18:19 ` [PATCH v7 4/4] PCI: qcom: Switch pcie_1_pipe_clk_src after PHY init in SC7280 Prasad Malisetty
2021-09-14 18:52   ` Bjorn Helgaas
2021-09-15  7:23     ` Prasad Malisetty [this message]
2021-09-15  2:44   ` Bjorn Andersson
2021-09-15  7:40     ` Prasad Malisetty

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