From: Dave Hansen <dave.hansen@intel.com>
To: "Liang, Kan" <kan.liang@linux.intel.com>,
Peter Zijlstra <peterz@infradead.org>
Cc: mingo@redhat.com, acme@kernel.org, tglx@linutronix.de,
bp@alien8.de, x86@kernel.org, linux-kernel@vger.kernel.org,
mark.rutland@arm.com, alexander.shishkin@linux.intel.com,
jolsa@redhat.com, namhyung@kernel.org, yu-cheng.yu@intel.com,
bigeasy@linutronix.de, gorcunov@gmail.com, hpa@zytor.com,
alexey.budankov@linux.intel.com, eranian@google.com,
ak@linux.intel.com, like.xu@linux.intel.com,
yao.jin@linux.intel.com
Subject: Re: [PATCH 17/21] x86/fpu: Use proper mask to replace full instruction mask
Date: Mon, 22 Jun 2020 08:02:44 -0700 [thread overview]
Message-ID: <c95b6ade-2cc9-e065-01ab-b449dd846c50@intel.com> (raw)
In-Reply-To: <aa3d239b-6ffe-261e-e70a-ffd17b8b506b@linux.intel.com>
On 6/22/20 7:52 AM, Liang, Kan wrote:
>>> --- a/arch/x86/kernel/fpu/xstate.c
>>> +++ b/arch/x86/kernel/fpu/xstate.c
>>> @@ -58,6 +58,7 @@ static short xsave_cpuid_features[] __initdata = {
>>> * XSAVE buffer, both supervisor and user xstates.
>>> */
>>> u64 xfeatures_mask_all __read_mostly;
>>> +EXPORT_SYMBOL_GPL(xfeatures_mask_all);
>>
>> *groan*...
>>
>> AFAICT KVM doesn't actually use any of those functions,
>
> It seems KVM may eventually invoke copy_xregs_to_kernel() as below.
>
> kvm_save_current_fpu()
> copy_fpregs_to_fpstate()
> copy_xregs_to_kernel()
>
> I think we have to export the xfeatures_mask_all.
I'm wondering if we should just take these copy_*regs_to_*() functions
and uninline them. Yeah, they are basically wrapping one instruction,
but it might literally be the most heavyweight instruction in the whole ISA.
Or, maybe just make an out-of-line version for KVM to call?
next prev parent reply other threads:[~2020-06-22 15:03 UTC|newest]
Thread overview: 40+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-06-19 14:03 [PATCH 00/21] Support Architectural LBR kan.liang
2020-06-19 14:03 ` [PATCH 01/21] x86/cpufeatures: Add Architectural LBRs feature bit kan.liang
2020-06-19 14:03 ` [PATCH 02/21] perf/x86/intel/lbr: Add pointers for LBR enable and disable kan.liang
2020-06-19 14:03 ` [PATCH 03/21] perf/x86/intel/lbr: Add pointer for LBR reset kan.liang
2020-06-19 14:03 ` [PATCH 04/21] perf/x86/intel/lbr: Add pointer for LBR read kan.liang
2020-06-19 14:03 ` [PATCH 05/21] perf/x86/intel/lbr: Add pointers for LBR save and restore kan.liang
2020-06-19 14:03 ` [PATCH 06/21] perf/x86/intel/lbr: Factor out a new struct for generic optimization kan.liang
2020-06-19 14:03 ` [PATCH 07/21] perf/x86/intel/lbr: Use dynamic data structure for task_ctx kan.liang
2020-06-19 14:03 ` [PATCH 08/21] x86/msr-index: Add bunch of MSRs for Arch LBR kan.liang
2020-06-19 19:11 ` Peter Zijlstra
2020-06-19 14:03 ` [PATCH 09/21] perf/x86: Expose CPUID enumeration bits for arch LBR kan.liang
2020-06-19 18:31 ` Peter Zijlstra
2020-06-19 14:03 ` [PATCH 10/21] perf/x86/intel: Check Arch LBR MSRs kan.liang
2020-06-19 14:03 ` [PATCH 11/21] perf/x86/intel/lbr: Support LBR_CTL kan.liang
2020-06-19 18:40 ` Peter Zijlstra
2020-06-19 19:15 ` Liang, Kan
2020-06-19 19:22 ` Peter Zijlstra
2020-06-19 14:04 ` [PATCH 12/21] perf/x86/intel/lbr: Support Architectural LBR kan.liang
2020-06-19 19:08 ` Peter Zijlstra
2020-06-19 19:40 ` Liang, Kan
2020-06-19 14:04 ` [PATCH 13/21] perf/core: Factor out functions to allocate/free the task_ctx_data kan.liang
2020-06-19 14:04 ` [PATCH 14/21] perf/core: Use kmem_cache to allocate the PMU specific data kan.liang
2020-06-19 14:04 ` [PATCH 15/21] perf/x86/intel/lbr: Create kmem_cache for the LBR context data kan.liang
2020-06-19 14:04 ` [PATCH 16/21] perf/x86: Remove task_ctx_size kan.liang
2020-06-19 14:04 ` [PATCH 17/21] x86/fpu: Use proper mask to replace full instruction mask kan.liang
2020-06-19 19:31 ` Peter Zijlstra
2020-06-22 14:52 ` Liang, Kan
2020-06-22 15:02 ` Dave Hansen [this message]
2020-06-22 17:47 ` Liang, Kan
2020-06-22 18:05 ` Dave Hansen
2020-06-22 18:46 ` Liang, Kan
2020-06-19 14:04 ` [PATCH 18/21] x86/fpu/xstate: Support dynamic supervisor feature for LBR kan.liang
2020-06-19 14:04 ` [PATCH 19/21] x86/fpu/xstate: Add helpers for LBR dynamic supervisor feature kan.liang
2020-06-19 14:04 ` [PATCH 20/21] perf/x86/intel/lbr: Support XSAVES/XRSTORS for LBR context switch kan.liang
2020-06-19 19:41 ` Peter Zijlstra
2020-06-19 22:28 ` Liang, Kan
2020-06-19 14:04 ` [PATCH 21/21] perf/x86/intel/lbr: Support XSAVES for arch LBR read kan.liang
2020-06-22 18:49 ` Cyrill Gorcunov
2020-06-22 19:11 ` Liang, Kan
2020-06-22 19:31 ` Cyrill Gorcunov
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