From: Krzysztof Kozlowski <krzk@kernel.org>
To: matthew.gerlach@linux.intel.com
Cc: lpieralisi@kernel.org, kw@linux.com,
manivannan.sadhasivam@linaro.org, robh@kernel.org,
bhelgaas@google.com, krzk+dt@kernel.org, conor+dt@kernel.org,
dinguyen@kernel.org, joyce.ooi@intel.com,
linux-pci@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org, matthew.gerlach@altera.com,
peter.colberg@altera.com
Subject: Re: [PATCH v5 4/5] arm64: dts: agilex: add dts enabling PCIe Root Port
Date: Wed, 5 Feb 2025 08:32:17 +0100 [thread overview]
Message-ID: <cb615ead-7dcf-430a-8265-60315c9a770b@kernel.org> (raw)
In-Reply-To: <4d9b5ca4-bebc-93c3-7d25-14d12899cab6@linux.intel.com>
On 04/02/2025 17:57, matthew.gerlach@linux.intel.com wrote:
>
>>
>>>>> +#include "socfpga_agilex_pcie_root_port.dtsi"
>>>>> +
>>>>
>>>> Missing board compatible, missing bindings.
>>>
>>> The model and compatible bindings are inherited from socfpga_agilex_socdk.dts.
>>
>> Then this is the same board, so entire DTS should be removed and instead
>> merged into parent DTS. There is no such thing as "inherit" of an
>> compatible.
>
> It is the same physical board, but the image programmed into the FPGA is
> different in so far as the PCIe IP is connected and enabled. This
> different FPGA image allows for a PCIe End Point to be plugged in. Is this
> difference enough for it be considered and different board?
Yes, it can be different board DTS. Look at other vendors how shared
designs are being actually shared between DTS - DTSI.
Best regards,
Krzysztof
next prev parent reply other threads:[~2025-02-05 7:32 UTC|newest]
Thread overview: 29+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-01-27 17:35 [PATCH v5 0/5] Add PCIe Root Port support for Agilex family of chips Matthew Gerlach
2025-01-27 17:35 ` [PATCH v5 1/5] dt-bindings: PCI: altera: Add binding for Agilex Matthew Gerlach
2025-01-30 7:34 ` Krzysztof Kozlowski
2025-02-01 18:11 ` matthew.gerlach
2025-01-27 17:35 ` [PATCH v5 2/5] arm64: dts: agilex: add soc0 label Matthew Gerlach
2025-01-29 9:45 ` Krzysztof Kozlowski
2025-01-29 19:10 ` matthew.gerlach
2025-01-27 17:35 ` [PATCH v5 3/5] arm64: dts: agilex: add dtsi for PCIe Root Port Matthew Gerlach
2025-01-29 9:47 ` Krzysztof Kozlowski
2025-01-29 19:42 ` matthew.gerlach
2025-01-30 7:26 ` Krzysztof Kozlowski
2025-02-01 19:12 ` matthew.gerlach
2025-02-02 14:17 ` Krzysztof Kozlowski
2025-02-02 18:49 ` matthew.gerlach
2025-02-02 19:02 ` Krzysztof Kozlowski
2025-02-04 17:15 ` matthew.gerlach
2025-01-29 20:43 ` Frank Li
2025-02-01 18:07 ` matthew.gerlach
2025-01-27 17:35 ` [PATCH v5 4/5] arm64: dts: agilex: add dts enabling " Matthew Gerlach
2025-01-29 9:49 ` Krzysztof Kozlowski
2025-01-29 22:54 ` matthew.gerlach
2025-01-30 7:31 ` Krzysztof Kozlowski
2025-02-04 16:57 ` matthew.gerlach
2025-02-05 7:32 ` Krzysztof Kozlowski [this message]
2025-01-27 17:35 ` [PATCH v5 5/5] PCI: altera: Add Agilex support Matthew Gerlach
2025-01-29 9:50 ` Krzysztof Kozlowski
2025-01-29 23:03 ` matthew.gerlach
2025-02-03 14:18 ` Manivannan Sadhasivam
2025-02-03 14:42 ` Krzysztof Kozlowski
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