Re: [PATCH 02/10] dt-bindings: display: imx: Add i.MX8qxp Display Controller display engine

Krzysztof Kozlowski
2024-07-07T14:00:06Z

On 05/07/2024 11:09, Liu Ying wrote:
> i.MX8qxp Display Controller display engine consists of all processing units
> that operate in a display clock domain.
>
> Signed-off-by: Liu Ying <victor.liu@nxp.com>
> ---
> .../imx/fsl,imx8qxp-dc-display-engine.yaml | 166 ++++++++++++++++++
> 1 file changed, 166 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/display/imx/fsl,imx8qxp-dc-display-engine.yaml
>
> diff --git a/Documentation/devicetree/bindings/display/imx/fsl,imx8qxp-dc-display-engine.yaml b/Documentation/devicetree/bindings/display/imx/fsl,imx8qxp-dc-display-engine.yaml
> new file mode 100644
> index 000000000000..dc9579897b76
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/display/imx/fsl,imx8qxp-dc-display-engine.yaml
> @@ -0,0 +1,166 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/display/imx/fsl,imx8qxp-dc-display-engine.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Freescale i.MX8qxp Display Controller Display Engine
> +
> +description:
> + All Processing Units that operate in a display clock domain. Pixel pipeline
> + is driven by a video timing and cannot be stalled. Implements all display
> + specific processing.
> +
> +maintainers:
> + - Liu Ying <victor.liu@nxp.com>
> +
> +properties:
> + compatible:
> + const: fsl,imx8qxp-dc-display-engine
> +
> + reg:
> + maxItems: 2
> +
> + reg-names:
> + items:
> + - const: top
> + - const: cfg
> +
> + resets:
> + maxItems: 1
> +
> + interrupts:
> + maxItems: 3
> +
> + interrupt-names:
> + items:
> + - const: shdload
> + - const: framecomplete
> + - const: seqcomplete
> +
> + power-domains:
> + maxItems: 1
> +
> + "#address-cells":
> + const: 1
> +
> + "#size-cells":
> + const: 1
> +
> + ranges: true
> +
> + fsl,dc-de-id:
> + description: Display Engine instance number
> + $ref: /schemas/types.yaml#/definitions/uint32
> + enum: [0, 1]

No, drop. For the same reason as earlier patch.

> +
> + port:
> + $ref: /schemas/graph.yaml#/properties/port
> + description: video output

Eh, mixing children with and without addresses is considered poor design.

> +
> +patternProperties:
> + "^dither@[0-9a-f]+$":
> + type: object
> + additionalProperties: true
> +
> + properties:
> + compatible:
> + const: fsl,imx8qxp-dc-dither
> +
> + "^framegen@[0-9a-f]+$":
> + type: object
> + additionalProperties: true
> +
> + properties:
> + compatible:
> + const: fsl,imx8qxp-dc-framegen
> +
> + "^gammacor@[0-9a-f]+$":

This looks like you are organizing bindings per your driver architecture.

Best regards,
Krzysztof