From: "Dutta, Anurag" <a-dutta@ti.com>
To: Mark Brown <broonie@kernel.org>, Nishanth Menon <nm@ti.com>
Cc: Francesco Dolcini <francesco@dolcini.it>,
Siddharth Vadapalli <s-vadapalli@ti.com>,
<linux-spi@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
<stable@vger.kernel.org>
Subject: Re: [PATCH] spi: cadence-quadspi: Fix clock enable underflows due to runtime PM
Date: Fri, 5 Dec 2025 18:28:06 +0530 [thread overview]
Message-ID: <cd95320b-6852-476e-bc8a-2e8d1ac77a9e@ti.com> (raw)
In-Reply-To: <2fcf5235-cc94-4202-9164-4889356c5264@sirena.org.uk>
Please ignore the previous mail.
Hi Mark and Nishanth The below seems to work for me on j721e. Let me
know your thoughts.
Apply over 6987d58a9cbc5bd57c983baa514474a86c945d56.
Also, the error actually comes from :
if (cqspi->use_direct_mode) {
ret = cqspi_request_mmap_dma(cqspi);
if (ret == -EPROBE_DEFER)
goto probe_setup_failed;
}
And not from flash_setup().
diff --git a/drivers/spi/spi-cadence-quadspi.c
b/drivers/spi/spi-cadence-quadspi.c
index af6d050da1c8..492b44976e52 100644
--- a/drivers/spi/spi-cadence-quadspi.c
+++ b/drivers/spi/spi-cadence-quadspi.c
@@ -2024,7 +2024,7 @@ static int cqspi_probe(struct platform_device *pdev)
probe_reset_failed:
if (cqspi->is_jh7110)
cqspi_jh7110_disable_clk(pdev, cqspi);
- clk_disable_unprepare(cqspi->clk);
+ pm_runtime_force_suspend(dev);
probe_clk_failed:
return ret;
}
Regards
Anurag
On 04-12-2025 22:35, Mark Brown wrote:
> On Thu, Dec 04, 2025 at 03:11:26PM +0000, Mark Brown wrote:
>> On Thu, Dec 04, 2025 at 08:05:30AM -0600, Nishanth Menon wrote:
>>> The clock is already turned off by the runtime-PM suspend callback, so an
>>> extra clk_disable*_unprepare() is only correct when runtime-PM support is
>>> not in use.
>> Right, I'm pretty sure that's where the extra disable is coming from.
>> The pm_runtime_set_active() further up the function is looking rather
>> suspect here.
> qspi_setup_flash() is just reading DT data, it's not actually
> interacting with the hardware at all, so I think we can sidestep the
> immediate issue by just moving it to where we parse the DT for the
> controller. It's not fixing the actual issue with the missing/extra
> clock reference but it does get us back to where we were:
>
> diff --git a/drivers/spi/spi-cadence-quadspi.c b/drivers/spi/spi-cadence-quadspi.c
> index af6d050da1c8..bdbeef05cd72 100644
> --- a/drivers/spi/spi-cadence-quadspi.c
> +++ b/drivers/spi/spi-cadence-quadspi.c
> @@ -1845,6 +1845,12 @@ static int cqspi_probe(struct platform_device *pdev)
> return -ENODEV;
> }
>
> + ret = cqspi_setup_flash(cqspi);
> + if (ret) {
> + dev_err(dev, "failed to setup flash parameters %d\n", ret);
> + return ret;
> + }
> +
> /* Obtain QSPI clock. */
> cqspi->clk = devm_clk_get(dev, NULL);
> if (IS_ERR(cqspi->clk)) {
> @@ -1988,12 +1994,6 @@ static int cqspi_probe(struct platform_device *pdev)
> pm_runtime_get_noresume(dev);
> }
>
> - ret = cqspi_setup_flash(cqspi);
> - if (ret) {
> - dev_err(dev, "failed to setup flash parameters %d\n", ret);
> - goto probe_setup_failed;
> - }
> -
> host->num_chipselect = cqspi->num_chipselect;
>
> if (ddata && (ddata->quirks & CQSPI_SUPPORT_DEVICE_RESET))
>
> I'll send this out later assuming nothing blows up in my CI and nobody
> else notices an issue.
next prev parent reply other threads:[~2025-12-05 12:58 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-12-02 22:53 [PATCH] spi: cadence-quadspi: Fix clock enable underflows due to runtime PM Mark Brown
2025-12-03 10:42 ` Siddharth Vadapalli
2025-12-03 11:58 ` Mark Brown
2025-12-04 9:13 ` Francesco Dolcini
2025-12-04 13:28 ` Mark Brown
2025-12-04 13:44 ` Mark Brown
2025-12-04 14:05 ` Nishanth Menon
2025-12-04 15:11 ` Mark Brown
2025-12-04 17:05 ` Mark Brown
2025-12-05 12:54 ` Dutta, Anurag
2025-12-05 12:58 ` Dutta, Anurag [this message]
2025-12-05 13:25 ` Mark Brown
2025-12-09 5:43 ` Dutta, Anurag
2025-12-09 9:52 ` Dutta, Anurag
2025-12-09 10:30 ` Mark Brown
2025-12-12 4:34 ` Dutta, Anurag
2025-12-12 6:04 ` Mark Brown
2025-12-12 6:07 ` Mark Brown
2025-12-12 7:14 ` Dutta, Anurag
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