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[103.229.18.19]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-28e8d1260f0sm197687845ad.46.2025.10.08.04.36.18 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 08 Oct 2025 04:36:20 -0700 (PDT) Message-ID: Date: Wed, 8 Oct 2025 17:06:16 +0530 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 03/24] arm64: dts: qcom: Introduce Glymur base dtsi and CRD dts To: Dmitry Baryshkov Cc: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org References: <20250925-v3_glymur_introduction-v1-0-24b601bbecc0@oss.qualcomm.com> <20250925-v3_glymur_introduction-v1-3-24b601bbecc0@oss.qualcomm.com> Content-Language: en-US From: Pankaj Patil In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-Authority-Analysis: v=2.4 cv=Hrl72kTS c=1 sm=1 tr=0 ts=68e64cb6 cx=c_pps a=IZJwPbhc+fLeJZngyXXI0A==:117 a=Ou0eQOY4+eZoSc0qltEV5Q==:17 a=IkcTkHD0fZMA:10 a=x6icFKpwvdMA:10 a=EUspDBNiAAAA:8 a=UueUnxlvPaCuvQdzJnAA:9 a=QEXdDO2ut3YA:10 a=uG9DUKGECoFWVXl0Dc02:22 X-Proofpoint-GUID: LmnPfT5P03cTlnNTIww6oSj5nuSYy595 X-Proofpoint-ORIG-GUID: LmnPfT5P03cTlnNTIww6oSj5nuSYy595 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUxMDA0MDAwNCBTYWx0ZWRfXxykSZepkdHqu XREqFOarXHVW4B5qKR2fvZot/1YthCCAPXAgkUpzQzliA33c+aUEPwqayakgT3JHTq0NwiwBVS3 3qJh8I3hLPM2mydyV2DDoyhaQbFKrDwHkG8eASxqm3SgH7fQgLBQX9+31TXK3c6InZd8cnAQKGc 869ISxloFjjhMQ9Cz3V/gCYNpoLwYL+VRy4BsK9bO4V6hzJMcopphONlVdQDDL1KJZPuFFZeV1d ts+PylPVfchThghfHET14/c6spvVFjHoWz80baJ8TD221smAODfzTwpjwVM+7OtXamLBk9/F26V Ud4QcgBWyGG04eV5lwYkZFRgr1qE4JtKj/XRGg2H83sfxYY/R+Rv8YD/nmxX8DQXuVF2Nvh/2Y6 pV3p5rWOCf+0PnLhqGZB5Nd/xRFCpQ== X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1117,Hydra:6.1.9,FMLib:17.12.80.40 definitions=2025-10-08_03,2025-10-06_01,2025-03-28_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 clxscore=1015 phishscore=0 spamscore=0 adultscore=0 lowpriorityscore=0 bulkscore=0 priorityscore=1501 malwarescore=0 impostorscore=0 suspectscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.19.0-2509150000 definitions=main-2510040004 On 9/25/2025 11:14 PM, Dmitry Baryshkov wrote: > On Thu, Sep 25, 2025 at 12:02:11PM +0530, Pankaj Patil wrote: >> Introduce initial device tree support for Glymur - Qualcomm's >> next-generation compute SoC and it's associated Compute Reference >> Device (CRD) platform. >> >> The dt describes CPUs, CPU map, GCC and RPMHCC clock controllers, >> geni UART, interrupt controller, TLMM, reserved memory, >> interconnects, SMMU, firmware scm, watchdog, apps rsc, RPMHPD, >> SRAM, PSCI and pmu nodes. >> >> Signed-off-by: Pankaj Patil >> --- >> arch/arm64/boot/dts/qcom/Makefile | 1 + >> arch/arm64/boot/dts/qcom/glymur-crd.dts | 25 + >> arch/arm64/boot/dts/qcom/glymur.dtsi | 1320 +++++++++++++++++++++++++++++++ > I think it's usually two separate patches Yes, for the next revision planning on separating patches in a manner where this commit will have bare-bone board dts so compilation doesn't break and singular commit to the board dts which enables required functionality. >> 3 files changed, 1346 insertions(+) >> >> diff --git a/arch/arm64/boot/dts/qcom/Makefile b/arch/arm64/boot/dts/qcom/Makefile >> index 296688f7cb26550f75bce65826f234bc24110356..15f31a7d3ac4a60224c43cfa52e9cc17dc28c49f 100644 >> --- a/arch/arm64/boot/dts/qcom/Makefile >> +++ b/arch/arm64/boot/dts/qcom/Makefile >> @@ -13,6 +13,7 @@ dtb-$(CONFIG_ARCH_QCOM) += apq8039-t2.dtb >> dtb-$(CONFIG_ARCH_QCOM) += apq8094-sony-xperia-kitakami-karin_windy.dtb >> dtb-$(CONFIG_ARCH_QCOM) += apq8096-db820c.dtb >> dtb-$(CONFIG_ARCH_QCOM) += apq8096-ifc6640.dtb >> +dtb-$(CONFIG_ARCH_QCOM) += glymur-crd.dtb >> dtb-$(CONFIG_ARCH_QCOM) += hamoa-iot-evk.dtb >> dtb-$(CONFIG_ARCH_QCOM) += ipq5018-rdp432-c2.dtb >> dtb-$(CONFIG_ARCH_QCOM) += ipq5018-tplink-archer-ax55-v1.dtb >> diff --git a/arch/arm64/boot/dts/qcom/glymur-crd.dts b/arch/arm64/boot/dts/qcom/glymur-crd.dts >> new file mode 100644 >> index 0000000000000000000000000000000000000000..a1714ec8492961b211ec761f16b39245007533b8 >> --- /dev/null >> +++ b/arch/arm64/boot/dts/qcom/glymur-crd.dts >> @@ -0,0 +1,25 @@ >> +// SPDX-License-Identifier: GPL-2.0-only >> +/* >> + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. >> + */ >> + >> +/dts-v1/; >> + >> +#include "glymur.dtsi" >> + >> +/ { >> + model = "Qualcomm Technologies, Inc. Glymur CRD"; >> + compatible = "qcom,glymur-crd", "qcom,glymur"; >> + >> + aliases { >> + serial0 = &uart21; >> + }; >> + >> + chosen { >> + stdout-path = "serial0:115200n8"; >> + }; >> +}; >> + >> +&tlmm { >> + gpio-reserved-ranges = <4 4>, <10 2>, <44 4>; /*Security SPI (TPM)*/ >> +}; >> diff --git a/arch/arm64/boot/dts/qcom/glymur.dtsi b/arch/arm64/boot/dts/qcom/glymur.dtsi >> new file mode 100644 >> index 0000000000000000000000000000000000000000..f1c5a0cb483670e9f8044e250950693b4a015479 >> --- /dev/null >> +++ b/arch/arm64/boot/dts/qcom/glymur.dtsi >> @@ -0,0 +1,1320 @@ >> +// SPDX-License-Identifier: GPL-2.0-only >> +/* >> + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. >> + */ >> + >> +#include >> +#include >> +#include >> +#include >> +#include >> +#include >> +#include >> +#include >> +#include >> +#include >> +#include >> +#include >> + >> +/ { >> + interrupt-parent = <&intc>; >> + #address-cells = <2>; >> + #size-cells = <2>; >> + >> + chosen { }; >> + >> + clocks { >> + xo_board: xo-board { >> + compatible = "fixed-clock"; >> + clock-frequency = <38400000>; >> + #clock-cells = <0>; >> + }; >> + >> + sleep_clk: sleep-clk { >> + compatible = "fixed-clock"; >> + clock-frequency = <32000>; > Can we please adapt a single style here? I think, at least frequency > should go to the board file. Sure, will do. >> + #clock-cells = <0>; >> + }; >> + }; >> +