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From: Jarkko Nikula <jarkko.nikula@linux.intel.com>
To: Shyam Sundar S K <Shyam-sundar.S-k@amd.com>,
	Alexandre Belloni <alexandre.belloni@bootlin.com>
Cc: Guruvendra Punugupati <Guruvendra.Punugupati@amd.com>,
	Krishnamoorthi M <krishnamoorthi.m@amd.com>,
	linux-i3c@lists.infradead.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH RESEND v3 2/6] i3c: mipi-i3c-hci: Read HC_CONTROL_PIO_MODE only after i3c hci v1.1
Date: Fri, 9 Aug 2024 16:21:17 +0300	[thread overview]
Message-ID: <ce725e2b-378c-46ba-86ad-a877de0e1ef4@linux.intel.com> (raw)
In-Reply-To: <20240807052359.290046-3-Shyam-sundar.S-k@amd.com>

Hi

On 8/7/24 8:23 AM, Shyam Sundar S K wrote:
> The HC_CONTROL_PIO_MODE bit was introduced in the HC_CONTROL register
> starting from version 1.1. Therefore, checking the HC_CONTROL_PIO_MODE bit
> on hardware that adheres to older specification revisions (i.e., versions
> earlier than 1.1) is incorrect. To address this, add an additional check
> to read the HCI version before attempting to read the HC_CONTROL_PIO_MODE
> status.
> 
> Signed-off-by: Shyam Sundar S K <Shyam-sundar.S-k@amd.com>
> ---
>   drivers/i3c/master/mipi-i3c-hci/core.c | 5 +++--
>   1 file changed, 3 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/i3c/master/mipi-i3c-hci/core.c b/drivers/i3c/master/mipi-i3c-hci/core.c
> index 24dd4603d6c6..a16da70bdfe1 100644
> --- a/drivers/i3c/master/mipi-i3c-hci/core.c
> +++ b/drivers/i3c/master/mipi-i3c-hci/core.c
> @@ -33,6 +33,7 @@
>   #define reg_clear(r, v)		reg_write(r, reg_read(r) & ~(v))
>   
>   #define HCI_VERSION			0x00	/* HCI Version (in BCD) */
> +#define HCI_VERSION_V1			0x100   /* MIPI HCI Version number V1.0 */
>   
>   #define HC_CONTROL			0x04
>   #define HC_CONTROL_BUS_ENABLE		BIT(31)
> @@ -756,7 +757,7 @@ static int i3c_hci_init(struct i3c_hci *hci)
>   	/* Try activating DMA operations first */
>   	if (hci->RHS_regs) {
>   		reg_clear(HC_CONTROL, HC_CONTROL_PIO_MODE);
> -		if (reg_read(HC_CONTROL) & HC_CONTROL_PIO_MODE) {
> +		if (regval > HCI_VERSION_V1 && !(reg_read(HC_CONTROL) & HC_CONTROL_PIO_MODE)) {
>   			dev_err(&hci->master.dev, "PIO mode is stuck\n");
>   			ret = -EIO;
>   		} else {

Here's typo and logic is reversed.

  reply	other threads:[~2024-08-09 13:21 UTC|newest]

Thread overview: 24+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-08-07  5:23 [PATCH RESEND v3 0/6] Introduce initial AMD I3C HCI driver support Shyam Sundar S K
2024-08-07  5:23 ` [PATCH RESEND v3 1/6] i3c: mipi-i3c-hci: Add MIPI0100 ACPI ID to the I3C Support List Shyam Sundar S K
2024-08-09 13:54   ` Jarkko Nikula
2024-08-09 14:18     ` Andy Shevchenko
2024-08-09 15:32       ` Shyam Sundar S K
2024-08-09 15:57         ` Andy Shevchenko
2024-08-09 16:24           ` Shyam Sundar S K
2024-08-09 18:39           ` Alexandre Belloni
2024-08-12 12:17             ` Andy Shevchenko
2024-08-07  5:23 ` [PATCH RESEND v3 2/6] i3c: mipi-i3c-hci: Read HC_CONTROL_PIO_MODE only after i3c hci v1.1 Shyam Sundar S K
2024-08-09 13:21   ` Jarkko Nikula [this message]
2024-08-09 15:46     ` Shyam Sundar S K
2024-08-07  5:23 ` [PATCH RESEND v3 3/6] i3c: mipi-i3c-hci: Add a quirk to set PIO mode Shyam Sundar S K
2024-08-09 13:55   ` Jarkko Nikula
2024-08-09 15:44     ` Shyam Sundar S K
2024-08-12  9:17       ` Jarkko Nikula
2024-08-12  9:32         ` Shyam Sundar S K
2024-08-19  6:41           ` Shyam Sundar S K
2024-08-19 11:10             ` Jarkko Nikula
2024-08-19 16:35               ` Shyam Sundar S K
2024-08-07  5:23 ` [PATCH RESEND v3 4/6] i3c: mipi-i3c-hci: Relocate helper macros to HCI header file Shyam Sundar S K
2024-08-09 13:21   ` Jarkko Nikula
2024-08-07  5:23 ` [PATCH RESEND v3 5/6] i3c: mipi-i3c-hci: Add a quirk to set timing parameters Shyam Sundar S K
2024-08-07  5:23 ` [PATCH RESEND v3 6/6] i3c: mipi-i3c-hci: Add a quirk to set Response buffer threshold Shyam Sundar S K

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