On Wed, 12 Nov 2025, Raag Jadav wrote: > Intel Elkhart Lake Programmable Service Engine (PSE) includes two PCI > devices that expose two different capabilities of GPIO and Timed I/O > as a single PCI function through shared MMIO with below layout. > > GPIO: 0x0000 - 0x1000 > TIO: 0x1000 - 0x2000 > > This driver enumerates the PCI parent device and creates auxiliary child > devices for these capabilities. The actual functionalities are provided > by their respective auxiliary drivers. > > Signed-off-by: Raag Jadav Acked-by: Ilpo Järvinen -- i. > --- > MAINTAINERS | 7 ++ > drivers/platform/x86/intel/Kconfig | 13 ++++ > drivers/platform/x86/intel/Makefile | 1 + > drivers/platform/x86/intel/ehl_pse_io.c | 86 +++++++++++++++++++++++++ > include/linux/ehl_pse_io_aux.h | 24 +++++++ > 5 files changed, 131 insertions(+) > create mode 100644 drivers/platform/x86/intel/ehl_pse_io.c > create mode 100644 include/linux/ehl_pse_io_aux.h > > diff --git a/MAINTAINERS b/MAINTAINERS > index 46126ce2f968..bd2a009d73c6 100644 > --- a/MAINTAINERS > +++ b/MAINTAINERS > @@ -12499,6 +12499,13 @@ F: drivers/gpu/drm/xe/ > F: include/drm/intel/ > F: include/uapi/drm/xe_drm.h > > +INTEL ELKHART LAKE PSE I/O DRIVER > +M: Raag Jadav > +L: platform-driver-x86@vger.kernel.org > +S: Supported > +F: drivers/platform/x86/intel/ehl_pse_io.c > +F: include/linux/ehl_pse_io_aux.h > + > INTEL ETHERNET DRIVERS > M: Tony Nguyen > M: Przemek Kitszel > diff --git a/drivers/platform/x86/intel/Kconfig b/drivers/platform/x86/intel/Kconfig > index 19a2246f2770..2900407d6095 100644 > --- a/drivers/platform/x86/intel/Kconfig > +++ b/drivers/platform/x86/intel/Kconfig > @@ -41,6 +41,19 @@ config INTEL_VBTN > To compile this driver as a module, choose M here: the module will > be called intel_vbtn. > > +config INTEL_EHL_PSE_IO > + tristate "Intel Elkhart Lake PSE I/O driver" > + depends on PCI > + select AUXILIARY_BUS > + help > + Select this option to enable Intel Elkhart Lake PSE GPIO and Timed > + I/O support. This driver enumerates the PCI parent device and > + creates auxiliary child devices for these capabilities. The actual > + functionalities are provided by their respective auxiliary drivers. > + > + To compile this driver as a module, choose M here: the module will > + be called intel_ehl_pse_io. > + > config INTEL_INT0002_VGPIO > tristate "Intel ACPI INT0002 Virtual GPIO driver" > depends on GPIOLIB && ACPI && PM_SLEEP > diff --git a/drivers/platform/x86/intel/Makefile b/drivers/platform/x86/intel/Makefile > index 78acb414e154..138b13756158 100644 > --- a/drivers/platform/x86/intel/Makefile > +++ b/drivers/platform/x86/intel/Makefile > @@ -21,6 +21,7 @@ intel-target-$(CONFIG_INTEL_HID_EVENT) += hid.o > intel-target-$(CONFIG_INTEL_VBTN) += vbtn.o > > # Intel miscellaneous drivers > +intel-target-$(CONFIG_INTEL_EHL_PSE_IO) += ehl_pse_io.o > intel-target-$(CONFIG_INTEL_INT0002_VGPIO) += int0002_vgpio.o > intel-target-$(CONFIG_INTEL_ISHTP_ECLITE) += ishtp_eclite.o > intel-target-$(CONFIG_INTEL_OAKTRAIL) += oaktrail.o > diff --git a/drivers/platform/x86/intel/ehl_pse_io.c b/drivers/platform/x86/intel/ehl_pse_io.c > new file mode 100644 > index 000000000000..861e14808b35 > --- /dev/null > +++ b/drivers/platform/x86/intel/ehl_pse_io.c > @@ -0,0 +1,86 @@ > +// SPDX-License-Identifier: GPL-2.0-only > +/* > + * Intel Elkhart Lake Programmable Service Engine (PSE) I/O > + * > + * Copyright (c) 2025 Intel Corporation. > + * > + * Author: Raag Jadav > + */ > + > +#include > +#include > +#include > +#include > +#include > +#include > +#include > +#include > +#include > +#include > + > +#include > + > +#define EHL_PSE_IO_DEV_SIZE SZ_4K > + > +static int ehl_pse_io_dev_create(struct pci_dev *pci, const char *name, int idx) > +{ > + struct device *dev = &pci->dev; > + struct auxiliary_device *adev; > + struct ehl_pse_io_data *data; > + resource_size_t start, offset; > + u32 id; > + > + data = devm_kzalloc(dev, sizeof(*data), GFP_KERNEL); > + if (!data) > + return -ENOMEM; > + > + id = (pci_domain_nr(pci->bus) << 16) | pci_dev_id(pci); > + start = pci_resource_start(pci, 0); > + offset = EHL_PSE_IO_DEV_SIZE * idx; > + > + data->mem = DEFINE_RES_MEM(start + offset, EHL_PSE_IO_DEV_SIZE); > + data->irq = pci_irq_vector(pci, idx); > + > + adev = __devm_auxiliary_device_create(dev, EHL_PSE_IO_NAME, name, data, id); > + > + return adev ? 0 : -ENODEV; > +} > + > +static int ehl_pse_io_probe(struct pci_dev *pci, const struct pci_device_id *id) > +{ > + int ret; > + > + ret = pcim_enable_device(pci); > + if (ret) > + return ret; > + > + pci_set_master(pci); > + > + ret = pci_alloc_irq_vectors(pci, 2, 2, PCI_IRQ_MSI); > + if (ret < 0) > + return ret; > + > + ret = ehl_pse_io_dev_create(pci, EHL_PSE_GPIO_NAME, 0); > + if (ret) > + return ret; > + > + return ehl_pse_io_dev_create(pci, EHL_PSE_TIO_NAME, 1); > +} > + > +static const struct pci_device_id ehl_pse_io_ids[] = { > + { PCI_VDEVICE(INTEL, 0x4b88) }, > + { PCI_VDEVICE(INTEL, 0x4b89) }, > + { } > +}; > +MODULE_DEVICE_TABLE(pci, ehl_pse_io_ids); > + > +static struct pci_driver ehl_pse_io_driver = { > + .name = EHL_PSE_IO_NAME, > + .id_table = ehl_pse_io_ids, > + .probe = ehl_pse_io_probe, > +}; > +module_pci_driver(ehl_pse_io_driver); > + > +MODULE_AUTHOR("Raag Jadav "); > +MODULE_DESCRIPTION("Intel Elkhart Lake PSE I/O driver"); > +MODULE_LICENSE("GPL"); > diff --git a/include/linux/ehl_pse_io_aux.h b/include/linux/ehl_pse_io_aux.h > new file mode 100644 > index 000000000000..afb8587ee5fb > --- /dev/null > +++ b/include/linux/ehl_pse_io_aux.h > @@ -0,0 +1,24 @@ > +/* SPDX-License-Identifier: GPL-2.0-only */ > +/* > + * Intel Elkhart Lake PSE I/O Auxiliary Device > + * > + * Copyright (c) 2025 Intel Corporation. > + * > + * Author: Raag Jadav > + */ > + > +#ifndef _EHL_PSE_IO_AUX_H_ > +#define _EHL_PSE_IO_AUX_H_ > + > +#include > + > +#define EHL_PSE_IO_NAME "ehl_pse_io" > +#define EHL_PSE_GPIO_NAME "gpio" > +#define EHL_PSE_TIO_NAME "pps_tio" > + > +struct ehl_pse_io_data { > + struct resource mem; > + int irq; > +}; > + > +#endif /* _EHL_PSE_IO_AUX_H_ */ >