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From: Can Guo <quic_cang@quicinc.com>
To: <neil.armstrong@linaro.org>, <bvanassche@acm.org>,
	<mani@kernel.org>, <adrian.hunter@intel.com>, <vkoul@kernel.org>,
	<beanhuo@micron.com>, <avri.altman@wdc.com>,
	<junwoo80.lee@samsung.com>, <martin.petersen@oracle.com>
Cc: <linux-scsi@vger.kernel.org>, <linux-arm-msm@vger.kernel.org>,
	Matthias Brugger <matthias.bgg@gmail.com>,
	AngeloGioacchino Del Regno 
	<angelogioacchino.delregno@collabora.com>,
	"open list:ARM/Mediatek SoC support:Keyword:mediatek" 
	<linux-kernel@vger.kernel.org>,
	"moderated list:ARM/Mediatek SoC support:Keyword:mediatek" 
	<linux-arm-kernel@lists.infradead.org>,
	"moderated list:ARM/Mediatek SoC support:Keyword:mediatek" 
	<linux-mediatek@lists.infradead.org>
Subject: Re: [PATCH v8 00/10] Enable HS-G5 support on SM8550
Date: Thu, 7 Dec 2023 16:26:12 +0800	[thread overview]
Message-ID: <cfd282bf-4e19-471f-9de2-18e286bce8bc@quicinc.com> (raw)
In-Reply-To: <e851f59a-a8fe-42fa-a3e3-65fc5b8f3269@linaro.org>

Hi Neil,

On 12/7/2023 4:22 PM, neil.armstrong@linaro.org wrote:
> Hi Can,
> 
> On 02/12/2023 13:36, Can Guo wrote:
>> This series enables HS-G5 support on SM8550.
>>
>> This series is rebased on below changes from Mani -
>> https://patchwork.kernel.org/project/linux-scsi/patch/20230908145329.154024-1-manivannan.sadhasivam@linaro.org/
>> https://patchwork.kernel.org/project/linux-scsi/patch/20230908145329.154024-2-manivannan.sadhasivam@linaro.org/
>>
>> This series is tested on below HW combinations -
>> SM8550 MTP + UFS4.0
>> SM8550 QRD + UFS3.1
>> SM8450 MTP + UFS3.1 (for regression test)
>> SM8350 MTP + UFS3.1 (for regression test)
>>
>> Note that during reboot test on above platforms, I occasinally hit PA 
>> (PHY)
>> error during the 2nd init, this is not related with this series. A fix 
>> for
>> this is mentioned in below patchwork -
>>
>> https://patchwork.kernel.org/project/linux-scsi/patch/1698145815-17396-1-git-send-email-quic_ziqichen@quicinc.com/
>>
>> Also note that on platforms, which have two sets of UFS PHY settings are
>> provided (say G4 and no-G4, G5 and no-G5). The two sets of PHY 
>> settings are
>> basically programming different values to different registers, mixing the
>> two sets and/or overwriting one set with another set is definitely not
>> blessed by UFS PHY designers. For SM8550, this series will make sure we
>> honor the rule. However, for old targets Mani and I will fix them in
>> another series in future.
> 
> You dropped my tested-by tags, but I did a new test with v8 and:
> 
> Tested-by: Neil Armstrong <neil.armstrong@linaro.org> # on SM8550-QRD
> Tested-by: Neil Armstrong <neil.armstrong@linaro.org> # on SM8650-QRD
> 

Thank you so much for testing this series.

I am sorry that I dropped the tested-by tags, since I slightly updated 
the last patch in this series, so I thought I should not apply the 
Tested-by tags from you.

Thanks,
Can Guo.

> Thanks,
> Neil
> 
>>
>> v7 -> v8:
>> In "scsi: ufs: ufs-qcom: Add support for UFS device version 
>> detection", fixed a BUG introduced from v6 -> v7. The spare register 
>> is added since HW ver 5, although reading the spare register on HW ver 
>> 4 is just getting 0x0, to be on the safe side, we are exluding HW ver 4.
>>
>> v6 -> v7:
>> 1. Rebased on linux-next, based SM8650 PHY settings are merged there, 
>> no changes to patches for UFS driver
>> 2. Addressed comments from Mani
>>
>> v5 -> v6:
>> 1. Rebased on scsi-queue-6.8
>> 2. Addressed comments from Dmitry and Mani in patches to 
>> phy-qcom-qmp-ufs.c
>>
>> v4 -> v5:
>> Removed two useless debug prints in patch #9
>>
>> v3 -> v4:
>> Used .tbls_hs_overlay array instead of adding more tables with 
>> different names like .tbls_hs_g5
>>
>> v2 -> v3:
>> 1. Addressed comments from Andrew, Mani and Bart in patch #1
>> 2. Added patch #2 as per request from Andrew and Mani
>> 3. Added patch #4 to fix a common issue on old targets, it is not 
>> necessary
>>     for this series, but put in this series only because it would be 
>> easier
>>     to maintain and no need to rebase
>> 4. Addressed comments from Dmitry and Mani in patches to 
>> phy-qcom-qmp-ufs.c
>>
>> v1 -> v2:
>> 1. Removed 2 changes which were exposing power info in sysfs
>> 2. Removed 1 change which was moving data structs to phy-qcom-qmp-ufs.h
>> 3. Added one new change (the 1st one) to clean up usage of 
>> ufs_dev_params based on comments from Mani
>> 4. Adjusted the logic of UFS device version detection according to 
>> comments from Mani:
>>     4.1 For HW version < 0x5, go through dual init
>>       4.2 For HW version >= 0x5
>>         a. If UFS device version is populated, one init is required
>>         b. If UFS device version is not populated, go through dual init
>>
>> Bao D. Nguyen (1):
>>    scsi: ufs: ufs-qcom: Add support for UFS device version detection
>>
>> Can Guo (9):
>>    scsi: ufs: host: Rename structure ufs_dev_params to ufs_host_params
>>    scsi: ufs: ufs-qcom: No need to set hs_rate after
>>      ufshcd_init_host_param()
>>    scsi: ufs: ufs-qcom: Setup host power mode during init
>>    scsi: ufs: ufs-qcom: Allow the first init start with the maximum
>>      supported gear
>>    scsi: ufs: ufs-qcom: Limit HS-G5 Rate-A to hosts with HW version 5
>>    scsi: ufs: ufs-qcom: Set initial PHY gear to max HS gear for HW ver 4
>>      and newer
>>    scsi: ufs: ufs-qcom: Check return value of phy_set_mode_ext()
>>    phy: qualcomm: phy-qcom-qmp-ufs: Rectify SM8550 UFS HS-G4 PHY Settings
>>    phy: qualcomm: phy-qcom-qmp-ufs: Add High Speed Gear 5 support for
>>      SM8550
>>
>>   drivers/phy/qualcomm/phy-qcom-qmp-pcs-ufs-v6.h     |   2 +
>>   drivers/phy/qualcomm/phy-qcom-qmp-qserdes-com-v6.h |   2 +
>>   .../qualcomm/phy-qcom-qmp-qserdes-txrx-ufs-v6.h    |   9 +
>>   drivers/phy/qualcomm/phy-qcom-qmp-ufs.c            | 191 
>> ++++++++++++++++++---
>>   drivers/ufs/host/ufs-exynos.c                      |   7 +-
>>   drivers/ufs/host/ufs-hisi.c                        |  11 +-
>>   drivers/ufs/host/ufs-mediatek.c                    |  12 +-
>>   drivers/ufs/host/ufs-qcom.c                        |  97 ++++++++---
>>   drivers/ufs/host/ufs-qcom.h                        |   7 +-
>>   drivers/ufs/host/ufshcd-pltfrm.c                   |  69 ++++----
>>   drivers/ufs/host/ufshcd-pltfrm.h                   |  10 +-
>>   11 files changed, 309 insertions(+), 108 deletions(-)
>>
> 

  reply	other threads:[~2023-12-07  8:27 UTC|newest]

Thread overview: 23+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-12-02 12:36 [PATCH v8 00/10] Enable HS-G5 support on SM8550 Can Guo
2023-12-02 12:36 ` [PATCH v8 01/10] scsi: ufs: host: Rename structure ufs_dev_params to ufs_host_params Can Guo
2023-12-04  2:53   ` Peter Wang (王信友)
2023-12-02 12:36 ` [PATCH v8 02/10] scsi: ufs: ufs-qcom: No need to set hs_rate after ufshcd_init_host_param() Can Guo
2023-12-02 12:36 ` [PATCH v8 03/10] scsi: ufs: ufs-qcom: Setup host power mode during init Can Guo
2023-12-02 12:36 ` [PATCH v8 04/10] scsi: ufs: ufs-qcom: Allow the first init start with the maximum supported gear Can Guo
2023-12-02 12:36 ` [PATCH v8 05/10] scsi: ufs: ufs-qcom: Limit HS-G5 Rate-A to hosts with HW version 5 Can Guo
2023-12-02 12:36 ` [PATCH v8 06/10] scsi: ufs: ufs-qcom: Set initial PHY gear to max HS gear for HW ver 4 and newer Can Guo
2023-12-02 12:36 ` [PATCH v8 07/10] scsi: ufs: ufs-qcom: Check return value of phy_set_mode_ext() Can Guo
2023-12-02 12:36 ` [PATCH v8 08/10] scsi: ufs: ufs-qcom: Add support for UFS device version detection Can Guo
2023-12-07  7:55   ` Manivannan Sadhasivam
2023-12-07  8:41   ` Nitin Rawat
2023-12-02 12:36 ` [PATCH v8 09/10] phy: qualcomm: phy-qcom-qmp-ufs: Rectify SM8550 UFS HS-G4 PHY Settings Can Guo
2023-12-21 17:13   ` Vinod Koul
2023-12-22  7:41     ` Can Guo
2023-12-22 15:49       ` Vinod Koul
2023-12-02 12:36 ` [PATCH v8 10/10] phy: qualcomm: phy-qcom-qmp-ufs: Add High Speed Gear 5 support for SM8550 Can Guo
2023-12-02 20:27   ` Dmitry Baryshkov
2023-12-07  8:22 ` [PATCH v8 00/10] Enable HS-G5 support on SM8550 neil.armstrong
2023-12-07  8:26   ` Can Guo [this message]
2023-12-14  3:44 ` Martin K. Petersen
2023-12-19  2:18 ` Martin K. Petersen
2023-12-21 17:15 ` (subset) " Vinod Koul

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