From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1758984AbcG0Fff (ORCPT ); Wed, 27 Jul 2016 01:35:35 -0400 Received: from 216-12-86-13.cv.mvl.ntelos.net ([216.12.86.13]:59230 "EHLO brightrain.aerifal.cx" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1756790AbcG0FfN (ORCPT ); Wed, 27 Jul 2016 01:35:13 -0400 Message-Id: From: Rich Felker Subject: [PATCH v4 0/2] J-Core interrupt controller support To: linux-kernel@vger.kernel.org, linux-sh@vger.kernel.org, devicetree@vger.kernel.org Cc: Jason Cooper , Marc Zyngier , Mark Rutland , Rob Herring , Thomas Gleixner Date: Wed, 27 Jul 2016 05:35:08 +0000 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org This driver is used with the J2, an open-source VHDL reimplementation of SH-2. I've split this out from the main J-Core support patches going upstream through my own linux-sh tree. Changes since the v3 stem out of reworking the DT to use separate reg ranges per cpu rather than cpu-offset. The intent is to avoid out-of-mapping arithmetic via cpu-offset and to avoid artifically restricting how the hardware lays out the mappings, but this also allows the cpu notifier logic which was present before to be removed with simple iteration over the reg ranges present in its place. Rich Rich Felker (2): of: add J-Core interrupt controller bindings irqchip: add J-Core AIC driver .../bindings/interrupt-controller/jcore,aic.txt | 26 +++++++ drivers/irqchip/Kconfig | 6 ++ drivers/irqchip/Makefile | 1 + drivers/irqchip/irq-jcore-aic.c | 79 ++++++++++++++++++++++ 4 files changed, 112 insertions(+) create mode 100644 Documentation/devicetree/bindings/interrupt-controller/jcore,aic.txt create mode 100644 drivers/irqchip/irq-jcore-aic.c -- 2.8.1