Re: [PATCH v11 1/4] dt-bindings:drm/bridge:anx7625:add vendor define

Rob Herring
2021-10-26T23:36:13Z

On Mon, 18 Oct 2021 11:03:23 +0800, Xin Ji wrote:
> Add 'bus-type' and 'data-lanes' define for port0. Add DP tx lane0,
> lane1 swing register setting array, and audio enable flag.
>
> The device which cannot pass DP tx PHY CTS caused by long PCB trace or
> embedded MUX, adjusting ANX7625 PHY parameters can pass the CTS test. The
> adjusting type include Pre-emphasis, Vp-p, Rterm(Resistor Termination)
> and Rsel(Driven Strength). Each lane has maximum 20 registers for
> these settings.
>
> Signed-off-by: Xin Ji <xji@analogixsemi.com>
> ---
> .../display/bridge/analogix,anx7625.yaml | 65 ++++++++++++++++++-
> 1 file changed, 63 insertions(+), 2 deletions(-)
>

Reviewed-by: Rob Herring <robh@kernel.org>