From: Reinette Chatre <reinette.chatre@intel.com>
To: jgg@nvidia.com, yishaih@nvidia.com,
shameerali.kolothum.thodi@huawei.com, kevin.tian@intel.com,
alex.williamson@redhat.com
Cc: tglx@linutronix.de, darwi@linutronix.de, kvm@vger.kernel.org,
dave.jiang@intel.com, jing2.liu@intel.com, ashok.raj@intel.com,
fenghua.yu@intel.com, tom.zanussi@linux.intel.com,
reinette.chatre@intel.com, linux-kernel@vger.kernel.org
Subject: [RFC PATCH 0/8] vfio/pci: Support dynamic allocation of MSI-X interrupts
Date: Wed, 15 Mar 2023 13:59:20 -0700 [thread overview]
Message-ID: <cover.1678911529.git.reinette.chatre@intel.com> (raw)
== Cover letter ==
Qemu allocates interrupts incrementally at the time the guest unmasks an
interrupt, for example each time a Linux guest runs request_irq().
Dynamic allocation of MSI-X interrupts was not possible until v6.2 [1].
This prompted Qemu to, when allocating a new interrupt, first release all
previously allocated interrupts (including disable of MSI-X) followed
by re-allocation of all interrupts that includes the new interrupt.
Please see [2] for a detailed discussion about this issue.
Releasing and re-allocating interrupts may be acceptable if all
interrupts are unmasked during device initialization. If unmasking of
interrupts occur during runtime this may result in lost interrupts.
For example, consider an accelerator device with multiple work queues,
each work queue having a dedicated interrupt. A work queue can be
enabled at any time with its associated interrupt unmasked while other
work queues are already active. Having all interrupts released and MSI-X
disabled to enable the new work queue will impact active work queues.
This series builds on the recent interrupt sub-system core changes
that added support for dynamic MSI-X allocation after initial MSI-X
enabling.
Add support for dynamic MSI-X allocation to vfio-pci. A flag
indicating lack of support for dynamic allocation already exist:
VFIO_IRQ_INFO_NORESIZE and has always been set for MSI and MSI-X. With
support for dynamic MSI-X the flag is cleared for MSI-X, enabling
Qemu to modify its behavior.
== Why is this an RFC ? ==
vfio support for dynamic MSI-X needs to work with existing user space
as well as upcoming user space that takes advantage of this feature.
I would appreciate guidance on the expectations and requirements
surrounding error handling when considering existing user space.
For example, consider the following scenario:
Start: Consider a passthrough device that supports 10 MSI-X interrupts
(0 to 9) and existing Qemu allocated interrupts 0 to 4.
Scenario: Qemu (hypothetically) attempts to associate a new action to
interrupts 0 to 7. Early checking of this range in
vfio_set_irqs_validate_and_prepare() will pass since it
is a valid range for the device. What happens after the
early checking is considered next:
Current behavior (before this series): Since the provided range, 0 - 7,
exceeds the allocated range, no action will be taken on existing
allocated interrupts 0 - 4 and the Qemu request will fail without
making any state changes.
New behavior (with this series): Since vfio supports dynamic MSI-X new
interrupts will be allocated for vectors 5, 6, and 7. Please note
that this changes the behavior encountered by unmodified Qemu: new
interrupts are allocated instead of returning an error. Even more,
since the range provided by Qemu spans 0 - 7, a failure during
allocation of 5, 6, or 7 will result in release of entire range.
This series aims to maintain existing error behavior for MSI (please see
"vfio/pci: Remove interrupt context counter") but I would appreciate your
guidance on whether existing error behavior should be maintained for MSI-X
and how to do so if it is a requirement.
Any feedback is appreciated
Reinette
[1] commit 34026364df8e ("PCI/MSI: Provide post-enable dynamic allocation interfaces for MSI-X")
[2] https://lore.kernel.org/kvm/MWHPR11MB188603D0D809C1079F5817DC8C099@MWHPR11MB1886.namprd11.prod.outlook.com/#t
Reinette Chatre (8):
vfio/pci: Consolidate irq cleanup on MSI/MSI-X disable
vfio/pci: Remove negative check on unsigned vector
vfio/pci: Prepare for dynamic interrupt context storage
vfio/pci: Use xarray for interrupt context storage
vfio/pci: Remove interrupt context counter
vfio/pci: Move to single error path
vfio/pci: Support dynamic MSI-x
vfio/pci: Clear VFIO_IRQ_INFO_NORESIZE for MSI-X
drivers/vfio/pci/vfio_pci_core.c | 3 +-
drivers/vfio/pci/vfio_pci_intrs.c | 376 ++++++++++++++++++++++--------
include/linux/vfio_pci_core.h | 3 +-
include/uapi/linux/vfio.h | 3 +
4 files changed, 286 insertions(+), 99 deletions(-)
base-commit: eeac8ede17557680855031c6f305ece2378af326
--
2.34.1
next reply other threads:[~2023-03-15 21:00 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-03-15 20:59 Reinette Chatre [this message]
2023-03-15 20:59 ` [RFC PATCH 1/8] vfio/pci: Consolidate irq cleanup on MSI/MSI-X disable Reinette Chatre
2023-03-15 20:59 ` [RFC PATCH 2/8] vfio/pci: Remove negative check on unsigned vector Reinette Chatre
2023-03-15 20:59 ` [RFC PATCH 3/8] vfio/pci: Prepare for dynamic interrupt context storage Reinette Chatre
2023-03-15 20:59 ` [RFC PATCH 4/8] vfio/pci: Use xarray for " Reinette Chatre
2023-03-15 20:59 ` [RFC PATCH 5/8] vfio/pci: Remove interrupt context counter Reinette Chatre
2023-03-15 20:59 ` [RFC PATCH 6/8] vfio/pci: Move to single error path Reinette Chatre
2023-03-15 20:59 ` [RFC PATCH 7/8] vfio/pci: Support dynamic MSI-x Reinette Chatre
2023-03-17 21:58 ` Alex Williamson
2023-03-17 22:54 ` Reinette Chatre
2023-03-15 20:59 ` [RFC PATCH 8/8] vfio/pci: Clear VFIO_IRQ_INFO_NORESIZE for MSI-X Reinette Chatre
2023-03-17 21:05 ` Alex Williamson
2023-03-17 22:21 ` Reinette Chatre
2023-03-17 23:01 ` Alex Williamson
2023-03-20 15:49 ` Reinette Chatre
2023-03-20 16:12 ` Jason Gunthorpe
2023-03-16 21:56 ` [RFC PATCH 0/8] vfio/pci: Support dynamic allocation of MSI-X interrupts Alex Williamson
2023-03-16 23:38 ` Reinette Chatre
2023-03-16 23:52 ` Tian, Kevin
2023-03-17 16:48 ` Reinette Chatre
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=cover.1678911529.git.reinette.chatre@intel.com \
--to=reinette.chatre@intel.com \
--cc=alex.williamson@redhat.com \
--cc=ashok.raj@intel.com \
--cc=darwi@linutronix.de \
--cc=dave.jiang@intel.com \
--cc=fenghua.yu@intel.com \
--cc=jgg@nvidia.com \
--cc=jing2.liu@intel.com \
--cc=kevin.tian@intel.com \
--cc=kvm@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=shameerali.kolothum.thodi@huawei.com \
--cc=tglx@linutronix.de \
--cc=tom.zanussi@linux.intel.com \
--cc=yishaih@nvidia.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox