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[69.109.179.158]) by smtp.gmail.com with ESMTPSA id cm24-20020a05690c0c9800b00545a08184c8sm2821000ywb.88.2023.04.10.07.03.17 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 10 Apr 2023 07:03:18 -0700 (PDT) From: William Breathitt Gray To: linux-iio@vger.kernel.org Cc: linux-kernel@vger.kernel.org, Andy Shevchenko , Johannes Berg , Jonathan Cameron , Andrew Morton , Al Viro , Nathan Chancellor , Nick Desaulniers , William Breathitt Gray Subject: [PATCH v3 0/3] Refactor 104-quad-8 to match device operations Date: Mon, 10 Apr 2023 10:03:10 -0400 Message-Id: X-Mailer: git-send-email 2.39.2 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Changes in v3: - Add __always_inline attribute for quad8_control_register_update() Changes in v2: - Drop FIELD_MODIFY() macro introduction; u8p_replace_bits() is utilized instead for the same purpose - Replace FIELD_PREP() and FIELD_GET() with u8_encode_bits() and u8_get_bits() - Replace FIELD_MODIFY() with u8p_replace_bits() - Wrap up control register update in quad8_control_register_update() - Utilize ioread8_rep() and iowrite8_rep() to read and write counter data The 104-quad-8 driver was initially introduced to the IIO subsystem where it didn't quite fit with the existing paradigm [0]; these differences eventually led to the creation of the Counter subsystem[1]. As a result of its awkward beginnings, the design of the 104-quad-8 driver was structured around maintaining abstract state buffers that would eventually be converted to match the actual device registers states on-the-fly as needed. The original design approach for the 104-quad-8 driver was neither efficient nor easy to troubleshoot, but it did allow us to focus on implementing and supporting necessary APIs for the nascent Counter subsystem. Now that development for the 104-quad-8 driver has shifted to maintenance, it is a good time to refactor and clean up the code to match closer to what is actually happening on the device. This patchset is an attempt to rectify the situation as such. The primary change is a transition from maintaining individual configuration states independently, to storing buffers of the device register configurations. To that end, the bitfield API is leveraged to access and retrieve field states. Some helper functions are introduced as well to abstract the handling of the PR, FLAG, PSC, and control registers. [0] https://lore.kernel.org/r/b43e2942b763b87afc85bfa9fe36e5695cba4c44.1475079578.git.vilhelm.gray@gmail.com/ [1] https://lore.kernel.org/r/cover.1554184734.git.vilhelm.gray@gmail.com/ William Breathitt Gray (3): counter: 104-quad-8: Utilize bitfield access macros counter: 104-quad-8: Refactor to buffer states for CMR, IOR, and IDR counter: 104-quad-8: Utilize helper functions to handle PR, FLAG and PSC drivers/counter/104-quad-8.c | 537 +++++++++++++++++------------------ 1 file changed, 258 insertions(+), 279 deletions(-) base-commit: 09a9639e56c01c7a00d6c0ca63f4c7c41abe075d -- 2.39.2