public inbox for linux-kernel@vger.kernel.org
 help / color / mirror / Atom feed
From: Christophe Leroy <christophe.leroy@csgroup.eu>
To: CASAUBON Jean Michel <jean-michel.casaubon@cs-soprasteria.com>,
	Michael Ellerman <mpe@ellerman.id.au>,
	Nicholas Piggin <npiggin@gmail.com>,
	Naveen N Rao <naveen@kernel.org>
Cc: Christophe Leroy <christophe.leroy@csgroup.eu>,
	linux-kernel@vger.kernel.org, linuxppc-dev@lists.ozlabs.org
Subject: [PATCH 00/14] Reduce alignment constraint on STRICT_KERNEL_RWX and speed-up TLB misses on 8xx and 603
Date: Tue, 20 Aug 2024 19:23:44 +0200	[thread overview]
Message-ID: <cover.1724173828.git.christophe.leroy@csgroup.eu> (raw)

This series does mainly two things:
- Remove the 8M alignment constraint on STRICT_KERNEL_RWX on 8xx to
avoid wasting memory.
- Speed-up TLB misses by duplicating kernel PGD entries into each
task's PGDIRs to avoid the address comparison in TLB miss handler.

On 8xx, the address comparison takes a significant part of CPU cycles
as it requires saving/restoring CR, and because a taken branch
requires 2 cycles.
On 603 it is less significant because CR is saved automatically and
has to be restored anyway but it is still worth it.

For ITLB misses:
- Kernel PGD entries are setup for once during init, before creation
of new PGDIRs.
- Module PGD entries are setup also at init by preallocating page
tables for a very few number of pages

For DTLB misses:
- Some handling is added in 8xx DATA TLB error interrupt and in
603 DATA read and store TLB miss interrupts to copy missing PGD
entries into child.

The cost of that additional handling on error paths is worth the gain
on hot TLB miss pathes.

Because 8xx and 603 don't use leaf kernel pages at PGD level, there is
no need to care about PGD entries cleanup, page tables are never freed.

Christophe Leroy (14):
  powerpc/8xx: Fix initial memory mapping
  powerpc/8xx: Fix kernel vs user address comparison
  powerpc/8xx: Copy kernel PGD entries into all PGDIRs
  Revert "powerpc/8xx: Always pin kernel text TLB"
  powerpc/8xx: Allow setting DATA alignment even with STRICT_KERNEL_RWX
  powerpc/8xx: Reduce default size of module/execmem area
  powerpc/8xx: Preallocate execmem page tables
  powerpc/8xx: Inconditionally use task PGDIR in ITLB misses
  powerpc/8xx: Inconditionally use task PGDIR in DTLB misses
  powerpc/32s: Reduce default size of module/execmem area
  powerpc/603: Copy kernel PGD entries into all PGDIRs and preallocate
    execmem page tables
  powerpc/603: Switch r0 and r3 in TLB miss handlers
  powerpc/603: Inconditionally use task PGDIR in ITLB misses
  powerpc/603: Inconditionally use task PGDIR in DTLB misses

 arch/powerpc/Kconfig                         |  31 +++-
 arch/powerpc/include/asm/book3s/32/pgtable.h |   3 +-
 arch/powerpc/include/asm/nohash/32/mmu-8xx.h |   3 +-
 arch/powerpc/include/asm/nohash/pgalloc.h    |   8 +-
 arch/powerpc/kernel/head_8xx.S               |  78 +++++-----
 arch/powerpc/kernel/head_book3s_32.S         | 144 +++++++++----------
 arch/powerpc/mm/book3s32/mmu.c               |   2 +
 arch/powerpc/mm/mem.c                        |  14 ++
 arch/powerpc/mm/nohash/8xx.c                 |   9 +-
 arch/powerpc/platforms/8xx/Kconfig           |   7 +
 10 files changed, 173 insertions(+), 126 deletions(-)

-- 
2.44.0


             reply	other threads:[~2024-08-20 17:24 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-08-20 17:23 Christophe Leroy [this message]
2024-08-20 17:23 ` [PATCH 01/14] powerpc/8xx: Fix initial memory mapping Christophe Leroy
2024-08-20 17:23 ` [PATCH 02/14] powerpc/8xx: Fix kernel vs user address comparison Christophe Leroy
2024-08-20 17:23 ` [PATCH 03/14] powerpc/8xx: Copy kernel PGD entries into all PGDIRs Christophe Leroy
2024-08-20 17:23 ` [PATCH 04/14] Revert "powerpc/8xx: Always pin kernel text TLB" Christophe Leroy
2024-08-20 17:23 ` [PATCH 05/14] powerpc/8xx: Allow setting DATA alignment even with STRICT_KERNEL_RWX Christophe Leroy
2024-08-20 17:23 ` [PATCH 06/14] powerpc/8xx: Reduce default size of module/execmem area Christophe Leroy
2024-08-20 17:23 ` [PATCH 07/14] powerpc/8xx: Preallocate execmem page tables Christophe Leroy
2024-08-20 17:23 ` [PATCH 08/14] powerpc/8xx: Inconditionally use task PGDIR in ITLB misses Christophe Leroy
2024-08-20 17:23 ` [PATCH 09/14] powerpc/8xx: Inconditionally use task PGDIR in DTLB misses Christophe Leroy
2024-08-20 17:23 ` [PATCH 10/14] powerpc/32s: Reduce default size of module/execmem area Christophe Leroy
2024-08-20 17:23 ` [PATCH 11/14] powerpc/603: Copy kernel PGD entries into all PGDIRs and preallocate execmem page tables Christophe Leroy
2024-08-20 17:23 ` [PATCH 12/14] powerpc/603: Switch r0 and r3 in TLB miss handlers Christophe Leroy
2024-08-20 17:23 ` [PATCH 13/14] powerpc/603: Inconditionally use task PGDIR in ITLB misses Christophe Leroy
2024-08-20 17:23 ` [PATCH 14/14] powerpc/603: Inconditionally use task PGDIR in DTLB misses Christophe Leroy
2024-09-06 11:52 ` [PATCH 00/14] Reduce alignment constraint on STRICT_KERNEL_RWX and speed-up TLB misses on 8xx and 603 Michael Ellerman

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=cover.1724173828.git.christophe.leroy@csgroup.eu \
    --to=christophe.leroy@csgroup.eu \
    --cc=jean-michel.casaubon@cs-soprasteria.com \
    --cc=linux-kernel@vger.kernel.org \
    --cc=linuxppc-dev@lists.ozlabs.org \
    --cc=mpe@ellerman.id.au \
    --cc=naveen@kernel.org \
    --cc=npiggin@gmail.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox