From: yankei.fong@altera.com
To: Dinh Nguyen <dinguyen@kernel.org>, Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
devicetree@vger.kernel.org (open list:OPEN FIRMWARE AND
FLATTENED DEVICE TREE BINDINGS),
linux-kernel@vger.kernel.org (open list),
Matthew Gerlach <matthew.gerlach@altera.com>,
Khairul Anuar Romli <khairul.anuar.romli@altera.com>
Subject: [PATCH v2 0/4] Add 4-bit SPI bus width on target devices
Date: Thu, 11 Sep 2025 09:37:22 +0800 [thread overview]
Message-ID: <cover.1756881243.git.yan.kei.fong@altera.com> (raw)
From: "Fong, Yan Kei" <yan.kei.fong@altera.com>
Add SPI bus width properties to correctly describe the hardware on the
following devices:
- Stratix10
- Agilex
- Agilex5
- N5X
Signed-off-by: Fong, Yan Kei <yan.kei.fong@altera.com>
Reviewed-by: Khairul Anuar Romli <khairul.anuar.romli@altera.com>
Reviewed-by: Matthew Gerlach <matthew.gerlach@altera.com>
---
changes in v2:
- rewrite the commit message body to align with 80 characters.
- add additional reviewer
---
Fong, Yan Kei (4):
arm64: dts: socfpga: n5x: Add 4-bit SPI bus width
arm64: dts: socfpga: stratix10: Add 4-bit SPI bus width
arm64: dts: socfpga: agilex: Add 4-bit SPI bus width
arm64: dts: socfpga: agilex5: Add 4-bit SPI bus width
arch/arm64/boot/dts/altera/socfpga_stratix10_socdk.dts | 2 ++
arch/arm64/boot/dts/intel/socfpga_agilex5_socdk.dts | 2 ++
arch/arm64/boot/dts/intel/socfpga_agilex_socdk.dts | 2 ++
arch/arm64/boot/dts/intel/socfpga_n5x_socdk.dts | 2 ++
4 files changed, 8 insertions(+)
--
2.25.1
WARNING: multiple messages have this Message-ID (diff)
From: "Fong, Yan Kei" <yan.kei.fong@altera.com>
To: Dinh Nguyen <dinguyen@kernel.org>, Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
devicetree@vger.kernel.org (open list:OPEN FIRMWARE AND
FLATTENED DEVICE TREE BINDINGS),
linux-kernel@vger.kernel.org (open list),
Matthew Gerlach <matthew.gerlach@altera.com>,
Khairul Anuar Romli <khairul.anuar.romli@altera.com>
Subject: [PATCH v2 0/4] Add 4-bit SPI bus width on target devices
Date: Thu, 11 Sep 2025 09:58:08 +0800 [thread overview]
Message-ID: <cover.1756881243.git.yan.kei.fong@altera.com> (raw)
Message-ID: <20250911015808.sMrCzd1CqFa5PhQ0cT23vqzoQ3MX-lTUYHVZ9BhD38Q@z> (raw)
Add SPI bus width properties to correctly describe the hardware on the
following devices:
- Stratix10
- Agilex
- Agilex5
- N5X
Signed-off-by: Fong, Yan Kei <yan.kei.fong@altera.com>
Reviewed-by: Khairul Anuar Romli <khairul.anuar.romli@altera.com>
Reviewed-by: Matthew Gerlach <matthew.gerlach@altera.com>
---
changes in v2:
- rewrite the commit message body to align with 80 characters.
- add additional reviewer
---
Fong, Yan Kei (4):
arm64: dts: socfpga: n5x: Add 4-bit SPI bus width
arm64: dts: socfpga: stratix10: Add 4-bit SPI bus width
arm64: dts: socfpga: agilex: Add 4-bit SPI bus width
arm64: dts: socfpga: agilex5: Add 4-bit SPI bus width
arch/arm64/boot/dts/altera/socfpga_stratix10_socdk.dts | 2 ++
arch/arm64/boot/dts/intel/socfpga_agilex5_socdk.dts | 2 ++
arch/arm64/boot/dts/intel/socfpga_agilex_socdk.dts | 2 ++
arch/arm64/boot/dts/intel/socfpga_n5x_socdk.dts | 2 ++
4 files changed, 8 insertions(+)
--
2.25.1
WARNING: multiple messages have this Message-ID (diff)
From: "Fong, Yan Kei" <yan.kei.fong@altera.com>
To: Dinh Nguyen <dinguyen@kernel.org>, Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
devicetree@vger.kernel.org (open list:OPEN FIRMWARE AND
FLATTENED DEVICE TREE BINDINGS),
linux-kernel@vger.kernel.org (open list),
Matthew Gerlach <matthew.gerlach@altera.com>,
Khairul Anuar Romli <khairul.anuar.romli@altera.com>
Subject: [PATCH v3 0/4] Add 4-bit SPI bus width on target devices
Date: Thu, 11 Sep 2025 10:21:14 +0800 [thread overview]
Message-ID: <cover.1756881243.git.yan.kei.fong@altera.com> (raw)
Message-ID: <20250911022114.npACz_RdPubdCi4yvUvIJ7H7n2y9e0eSBcdQBH6boE8@z> (raw)
Add SPI bus width properties to correctly describe the hardware on the
following devices:
- Stratix10
- Agilex
- Agilex5
- N5X
Signed-off-by: Fong, Yan Kei <yan.kei.fong@altera.com>
Reviewed-by: Khairul Anuar Romli <khairul.anuar.romli@altera.com>
Reviewed-by: Matthew Gerlach <matthew.gerlach@altera.com>
---
changes in v3:
- remove the unalign email shown in the commit message body
changes in v2:
- rewrite the commit message body to align with 80 characters.
- add additional reviewer
---
Fong, Yan Kei (4):
arm64: dts: socfpga: n5x: Add 4-bit SPI bus width
arm64: dts: socfpga: stratix10: Add 4-bit SPI bus width
arm64: dts: socfpga: agilex: Add 4-bit SPI bus width
arm64: dts: socfpga: agilex5: Add 4-bit SPI bus width
arch/arm64/boot/dts/altera/socfpga_stratix10_socdk.dts | 2 ++
arch/arm64/boot/dts/intel/socfpga_agilex5_socdk.dts | 2 ++
arch/arm64/boot/dts/intel/socfpga_agilex_socdk.dts | 2 ++
arch/arm64/boot/dts/intel/socfpga_n5x_socdk.dts | 2 ++
4 files changed, 8 insertions(+)
--
2.25.1
WARNING: multiple messages have this Message-ID (diff)
From: "Fong, Yan Kei" <yan.kei.fong@altera.com>
To: Dinh Nguyen <dinguyen@kernel.org>, Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
devicetree@vger.kernel.org (open list:OPEN FIRMWARE AND
FLATTENED DEVICE TREE BINDINGS),
linux-kernel@vger.kernel.org (open list),
Matthew Gerlach <matthew.gerlach@altera.com>,
Khairul Anuar Romli <khairul.anuar.romli@altera.com>
Subject: [PATCH v3 0/4] Add 4-bit SPI bus width on target devices
Date: Wed, 17 Sep 2025 14:44:50 +0800 [thread overview]
Message-ID: <cover.1756881243.git.yan.kei.fong@altera.com> (raw)
Message-ID: <20250917064450.donrfEFt5D7ZcX0k9eDByg7bnd-DG7PSuRiptRkcFNo@z> (raw)
> > Add SPI bus width properties to correctly describe the hardware on the
> > following devices:
> > - Stratix10
> > - Agilex
> > - Agilex5
> > - N5X
> >
> > Signed-off-by: Fong, Yan Kei <yan.kei.fong@altera.com>
> > Reviewed-by: Khairul Anuar Romli <khairul.anuar.romli@altera.com>
> > Reviewed-by: Matthew Gerlach <matthew.gerlach@altera.com>
> > ---
> > changes in v3:
> > - remove the unalign email shown in the commit message body
> > changes in v2:
> > - rewrite the commit message body to align with 80 characters.
> > - add additional reviewer
> > ---
>
> You have a series of v2 and v3 patches in the same thread. Which ones
> should I look at?
Hi Dinh, you may look at v3 patches. Thank you.
next reply other threads:[~2025-09-11 1:37 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-09-11 1:37 yankei.fong [this message]
2025-09-11 1:37 ` [PATCH v2 1/4] arm64: dts: socfpga: n5x: Add 4-bit SPI bus width yankei.fong
2025-09-11 1:58 ` [PATCH v3 " Fong, Yan Kei
2025-09-11 1:37 ` [PATCH v2 2/4] arm64: dts: socfpga: stratix10: " yankei.fong
2025-09-11 1:58 ` [PATCH v3 " Fong, Yan Kei
2025-09-11 1:37 ` [PATCH v2 3/4] arm64: dts: socfpga: agilex: " yankei.fong
2025-09-11 1:58 ` [PATCH v3 " Fong, Yan Kei
2025-09-11 1:37 ` [PATCH v2 4/4] arm64: dts: socfpga: agilex5: " yankei.fong
2025-09-11 1:58 ` [PATCH v3 " Fong, Yan Kei
2025-09-11 1:58 ` [PATCH v2 0/4] Add 4-bit SPI bus width on target devices Fong, Yan Kei
2025-09-11 2:21 ` [PATCH v3 " Fong, Yan Kei
2025-09-12 12:30 ` Dinh Nguyen
2025-09-17 6:44 ` Fong, Yan Kei
2025-10-15 3:10 ` Dinh Nguyen
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=cover.1756881243.git.yan.kei.fong@altera.com \
--to=yankei.fong@altera.com \
--cc=conor+dt@kernel.org \
--cc=devicetree@vger.kernel.org \
--cc=dinguyen@kernel.org \
--cc=khairul.anuar.romli@altera.com \
--cc=krzk+dt@kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=matthew.gerlach@altera.com \
--cc=robh@kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox