From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from pidgin.makrotopia.org (pidgin.makrotopia.org [185.142.180.65]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 368821EA7CC; Tue, 27 Jan 2026 13:18:39 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.142.180.65 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1769519921; cv=none; b=hi6ZuiVK9Zj+H/ReP0vYwTnWJd15dltFQgcYjMFX/0v8aEZQkaARzKjpkAgxFK+6n+AZP8Lf9KoDc0wlTdxp2bAhEGUc+d1901frrFfh8VNWojh1LAhSJQ+Z46dy4kiusllzeQ00NBi1A5LUk7dQwLtr2fQeIa6GZb+CYahooU0= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1769519921; c=relaxed/simple; bh=/rFQr+bCk/DT81TFu+3G2s2WTbhh7E/TOXaSjG/VvXU=; h=Date:From:To:Subject:Message-ID:MIME-Version:Content-Type: Content-Disposition; b=DoNBxlsYJ5nCAfBpqD4xqmMyicI9Ac+9zjhLzOvsAECAOuPnRtuJfsNRVh/sOTQLKPGzKvMoTbgtHzUamI6+GjC4Z6KQFbNjk6KcvxDl396ZCzqyZNoq4rUPWHFGZo8h4xjxe77uAcKqYIOxKCH5rOSsXO5kWiWPnhwiFniUopo= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=makrotopia.org; spf=pass smtp.mailfrom=makrotopia.org; arc=none smtp.client-ip=185.142.180.65 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=makrotopia.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=makrotopia.org Received: from local by pidgin.makrotopia.org with esmtpsa (TLS1.3:TLS_AES_256_GCM_SHA384:256) (Exim 4.99) (envelope-from ) id 1vkixj-000000000SR-2sRb; Tue, 27 Jan 2026 13:18:31 +0000 Date: Tue, 27 Jan 2026 13:18:27 +0000 From: Daniel Golle To: Hauke Mehrtens , Andrew Lunn , Vladimir Oltean , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Conor Dooley , netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH net-next 0/3] net: dsa: mxl-gsw1xx: setup polarities and validate chip Message-ID: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Now that common PHY properties make it easy to configure the SerDes RX and TX polarities, use that for the SGMII/1000Base-X/2500Base-X PCS of the MaxLinear GSW1xx switches. Also, validate hardware in probe() function to make sure the switch is actually present and MDIO communication works properly. Daniel Golle (3): dt-bindings: net: dsa: lantiq,gswip: reference common PHY properties net: dsa: mxl-gsw1xx: configure PCS polarities net: dsa: mxl-gsw1xx: validate chip ID .../bindings/net/dsa/lantiq,gswip.yaml | 1 + drivers/net/dsa/lantiq/Kconfig | 1 + drivers/net/dsa/lantiq/mxl-gsw1xx.c | 65 +++++++++++++++---- drivers/net/dsa/lantiq/mxl-gsw1xx.h | 9 +++ 4 files changed, 65 insertions(+), 11 deletions(-) -- 2.52.0