From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from pidgin.makrotopia.org (pidgin.makrotopia.org [185.142.180.65]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 8E8671EDA2C; Sun, 1 Feb 2026 03:41:45 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.142.180.65 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1769917307; cv=none; b=ngw3W+yAaj99/yF4rKUEIStMINPxTHj5hlA+mtcHg3MTd8fUikN650x7rLEZ3HziAjNUVN79x9Z0SnaLif9L0Sm9Ml5devUStOMb0QOI4sUnXO+8PhqR8WZfGvi8U1V26BMvDV5n6fA8i9DOodspysHpoPzJ5/W7DUE3v4OmxLs= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1769917307; c=relaxed/simple; bh=bnnJAHumSHO4V2SDDaOm9PehTi5dNf6iI3BecXzzN2c=; h=Date:From:To:Subject:Message-ID:MIME-Version:Content-Type: Content-Disposition; b=ZvJ1YZExfe40n4gHD8T3Tsi/X8E/ZdHlRQgMmziQ/3uYApj5M1PQesSQfuTna3dW4Bt6HHGvm0J6RJh9QBJlLYLCgwAx5HTA9JfUOria7Yr4+j4hGHF1Pm1IfsXfUebAJcf4cPP6l8jfiT7Zy/5U8+a9b5HT4Ig5lc9Obv14zkk= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=makrotopia.org; spf=pass smtp.mailfrom=makrotopia.org; arc=none smtp.client-ip=185.142.180.65 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=makrotopia.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=makrotopia.org Received: from local by pidgin.makrotopia.org with esmtpsa (TLS1.3:TLS_AES_256_GCM_SHA384:256) (Exim 4.99) (envelope-from ) id 1vmOLB-000000002WN-4BU9; Sun, 01 Feb 2026 03:41:38 +0000 Date: Sun, 1 Feb 2026 03:41:34 +0000 From: Daniel Golle To: Hauke Mehrtens , Andrew Lunn , Vladimir Oltean , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Conor Dooley , netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH net-next v3 0/3] net: dsa: mxl-gsw1xx: setup polarities and validate chip Message-ID: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Now that common PHY properties make it easy to configure the SerDes RX and TX polarities, use that for the SGMII/1000Base-X/2500Base-X port of the MaxLinear GSW1xx switches. Also, validate hardware in probe() function to make sure the switch is actually present and MDIO communication works properly. --- Changes since v2: * be more clear about describing polarity at port, ie. external pin level Changes since initial submission: * use allOf to include phy-common-props in dt-schema * use phy_get_manual_rx_polarity and phy_get_manual_tx_polarity helpers instead of open-coding them Daniel Golle (3): dt-bindings: net: dsa: lantiq,gswip: reference common PHY properties net: dsa: mxl-gsw1xx: configure SerDes port polarities net: dsa: mxl-gsw1xx: validate chip ID .../bindings/net/dsa/lantiq,gswip.yaml | 4 ++ drivers/net/dsa/lantiq/Kconfig | 1 + drivers/net/dsa/lantiq/mxl-gsw1xx.c | 66 +++++++++++++++---- drivers/net/dsa/lantiq/mxl-gsw1xx.h | 9 +++ 4 files changed, 68 insertions(+), 12 deletions(-) -- 2.52.0