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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: DE7xvWd5a63hkrfhmcAIOWSxc55BQYlNlrOMXkJVBQdNRuzCGJZvmsdSmG/ZnC0WrGOen0ProCIBm2AL/aRZZTiPIjuvscO1TGfyF6w4AA3oTw/9vrhPz2rBoqH6NlLoNDjArjmYBFOIqqnxjMvZG0zGIMFM2C0jo0BTdm7b8zw1awC5DXfdkpSn0tNSJ1xgCXgO6VRWCa9cyWhpMvEM531QtgUEDhBxjpCMsFPFhQW0YU/usVjiL0lzzeKar5nNve/LZJU0+nFKF7SHf6RHTN/VdA3v5rd3vAR4Ys3kwOlhBVJ+ucsCWG89yWVa2AgukDvJzQZNxH9yT55aNSC/nH0fSmeZQQIH6A+WZTE25WBzO0V43gdx7A+A8/ziWey5HHz8Tf5R4xaq4aTPgyFNzKWmP8+v+nLH4aOIoZVutmp2Ujj13SG0QBkla/EleiBH X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 24 Apr 2026 01:41:46.3073 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 287431ce-e85b-4331-cc76-08dea1a2a556 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb07.amd.com] X-MS-Exchange-CrossTenant-AuthSource: MWH0EPF000A6735.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DS0PR12MB8456 This series adds resctrl support for two new AMD memory-bandwidth allocation features: - GMBA - Global Memory Bandwidth Allocation (hardware name: GLBE). Bounds DRAM bandwidth for groups of threads that span multiple L3 QoS domains, rather than being per-L3 like MBA. - GSMBA - Global Slow Memory Bandwidth Allocation (hardware name: GLSBE). The CXL.memory / slow-memory counterpart of GMBA, analogous to how SMBA relates to MBA. Both features share a new "NPS-node" control domain: a set of QoS (L3) domains grouped together and aligned to the system's NPS (Nodes Per Socket) BIOS configuration. Although the control domain is NPS-scoped, the underlying bandwidth-limit MSRs (MSR_IA32_GMBA_BW_BASE 0xc0000600, MSR_IA32_GSMBA_BW_BASE 0xc0000680) are instantiated per L3. Programming a single control domain therefore requires writing the MSR on one CPU per L3 that the domain spans - a new pattern for resctrl. Patches 2/8 and 3/8 introduce that infrastructure so the new resources can reuse it. The features are documented in: AMD64 Zen6 Platform Quality of Service (PQOS) Extensions, Publication # 69193 Revision 1.00, Issue Date March 2026 available at https://bugzilla.kernel.org/show_bug.cgi?id=206537 Series overview --------------- Patches 1-5 to enable GMBA: 1/8 x86,fs/resctrl: Add support for Global Bandwidth Enforcement (GLBE) 2/8 x86/resctrl: Add RESCTRL_NPS_NODE scope for AMD NPS-aligned domains Add a new ctrl_scope value for resctrl resources whose control domain spans multiple L3s within an NPS node. 3/8 x86/resctrl: Update control MSRs per L3 for NPS-scoped resources Add resctrl_arch_update_nps(): builds a cpumask with one CPU per distinct L3 in the domain, then issues rdt_ctrl_update() via smp_call_function_many() on that mask. Falls back to the full domain mask if the scratch masks cannot be built. Route resctrl_arch_update_domains() and resctrl_arch_reset_all_ctrls() through this helper when ctrl_scope == RESCTRL_NPS_NODE. 4/8 x86,fs/resctrl: Add the resource for Global Memory Bandwidth Allocation Register RDT_RESOURCE_GMBA in rdt_resources_all[] with ctrl_scope=RESCTRL_NPS_NODE and schema_fmt=RANGE, add commands to discover feature details. 5/8 fs/resctrl: Add the documentation for Global Memory Bandwidth Allocation Add examples in Documentation/filesystems/resctrl.rst. Patches 6-8 to enable GSMBA in the same shape: 6/8 x86,fs/resctrl: Add support for Global Slow Memory Bandwidth Allocation 7/8 x86,fs/resctrl: Add the resource for Global Slow Memory Bandwidth Allocation Register RDT_RESOURCE_GSMBA with ctrl_scope=RESCTRL_NPS_NODE. 8/8 fs/resctrl: Add the documentation for Global Slow Memory Bandwidth Allocation Add examples in Documentation/filesystems/resctrl.rst. Changes since v1 ---------------- - Earlier sent RFC(v1) with Global Bandwidth Enforcement (GLBE) and Privilege Level Zero Association (PLZA). This series only handles Global Memory Bandwidth Allocation. Both the features are sent separately. - Documentation * Fixed grammar in the GMBA / GSMBA sections of resctrl.rst. * Added examples to update GMBA and GSMBA in resctrl.rst documentation. - Major changes are releated to RESCTRL_NPS_NODE scope handling. - Commit messages * Reworked the changelogs in all the patches. Previous Revisions: v1 : https://lore.kernel.org/lkml/cover.1769029977.git.babu.moger@amd.com/ --- base-commit: 216fe4b3e06754e73c79a88b1df7e9806e41f29d Signed-off-by: Babu Moger Babu Moger (8): x86,fs/resctrl: Add support for Global Bandwidth Enforcement (GLBE) x86/resctrl: Add RESCTRL_NPS_NODE scope for AMD NPS-aligned domains x86/resctrl: Update control MSRs per L3 for NPS-scoped resources x86,fs/resctrl: Add the resource for Global Bandwidth Allocation fs/resctrl: Add the documentation for Global Memory Bandwidth Allocation x86,fs/resctrl: Add support for Global Slow Memory Bandwidth Allocation x86,fs/resctrl: Add the resource for Global Slow Memory Bandwidth Allocation fs/resctrl: Add the documentation for Global Slow Memory Bandwidth Allocation .../admin-guide/kernel-parameters.txt | 2 +- Documentation/filesystems/resctrl.rst | 81 ++++++++++++++ arch/x86/include/asm/cpufeatures.h | 3 +- arch/x86/include/asm/msr-index.h | 2 + arch/x86/kernel/cpu/resctrl/core.c | 101 +++++++++++++++++- arch/x86/kernel/cpu/resctrl/ctrlmondata.c | 90 +++++++++++++++- arch/x86/kernel/cpu/resctrl/internal.h | 1 + arch/x86/kernel/cpu/resctrl/rdtgroup.c | 15 ++- arch/x86/kernel/cpu/scattered.c | 2 + fs/resctrl/ctrlmondata.c | 5 +- fs/resctrl/rdtgroup.c | 25 ++++- include/linux/resctrl.h | 3 + 12 files changed, 313 insertions(+), 17 deletions(-) -- 2.43.0