From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.14]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 067B0320CD9 for ; Thu, 4 Jun 2026 16:17:45 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.14 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1780589867; cv=none; b=Rh9EiPFm66VZGMRiHETBzUPz6kGfJCqc8kRJBWMOHgx76qjQ3GKbVlgxFNHbkdcnSIdgRoeucAh+8GvUrE70Y/Vc8/meJtFi9uKg9ioFffwDQXFUsyhjl91FpBTJabT8ead8Wm8GZXJVNm6DqPTb53C02QApiFZhaWTFw585KJE= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1780589867; c=relaxed/simple; bh=KSxhPBe0BWTfo8fhp+ZVjK2bYPZpsQeuvnRda+8KStY=; h=From:To:Cc:Subject:Date:Message-Id:MIME-Version; b=mnmV7Ek3/8W5wSU4L9fXT45wzK91fEUZmiCVtvcEDhPT8eeFbIpXZ33jzN9y+01/Wk6Ar5q7LuovEc9v3cm/y0WwLzNADThwjzuLj9yneBMQz1DdgzM0+g8bZnnsTaCU9jhjXBQysC3X4pDV7eDclrE//JA5gE2YATHTsIRovp8= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=g9d9ZC9+; arc=none smtp.client-ip=198.175.65.14 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="g9d9ZC9+" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1780589866; x=1812125866; h=from:to:cc:subject:date:message-id:mime-version: content-transfer-encoding; bh=KSxhPBe0BWTfo8fhp+ZVjK2bYPZpsQeuvnRda+8KStY=; b=g9d9ZC9+kLZKORSDUAerRKnOT2Few9Ws18gU2KK4WZEvXvkKYA0pjtyS as0MfpUdYqvqAc3zWziLoaBUuWV+lZyQ/W9BgyJfh8Cxs+/Tp4VKjcXNR woTCdZEyTMbyPMuph9/UD0ZR24GI4zkZLtmqZzXU3Q4vhqsn7WoJGl4q2 Kee2HXB2uhahpQDqkxxc+X9DRDmEMEDqlVspncf3P7Md/oJFZquJjB4LK sHlO0xjx4JN3ZX1VOYJ8BLaXEIBSUup7UOsWzOfX4LHl7OgH8xhuL1RVn 0TPuUGv8SRt7IXon20SrT2m/+yFbYMtI0sSFlUEeEQ98vbvjtBSCyCNUQ A==; X-CSE-ConnectionGUID: hT0whH9DQfy6IYSrec19xQ== X-CSE-MsgGUID: u/FBxR2zRgGpc3NbBGDPuQ== X-IronPort-AV: E=McAfee;i="6800,10657,11807"; a="85310301" X-IronPort-AV: E=Sophos;i="6.24,187,1774335600"; d="scan'208";a="85310301" Received: from fmviesa007.fm.intel.com ([10.60.135.147]) by orvoesa106.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 04 Jun 2026 09:17:45 -0700 X-CSE-ConnectionGUID: xE69FdImRMChZybc3oYEgA== X-CSE-MsgGUID: 0ZZVweZTQ4CGlNMimPBrUw== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.24,187,1774335600"; d="scan'208";a="241602098" Received: from chenyu-dev.sh.intel.com ([10.239.62.107]) by fmviesa007.fm.intel.com with ESMTP; 04 Jun 2026 09:17:41 -0700 From: Chen Yu To: tony.luck@intel.com, reinette.chatre@intel.com Cc: x86@kernel.org, linux-kernel@vger.kernel.org, bp@alien8.de, tglx@kernel.org, mingo@redhat.com, dave.hansen@linux.intel.com, hpa@zytor.com, dave.martin@arm.com, james.morse@arm.com, fenghuay@nvidia.com, babu.moger@amd.com, anil.keshavamurthy@broadcom.com Subject: [PATCH v2 0/6] Introduce MMIO-based CMT access for Enhanced RDT Date: Fri, 5 Jun 2026 00:07:53 +0800 Message-Id: X-Mailer: git-send-email 2.25.1 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Intel Enhanced Resource Director Technology (ERDT) extends the existing RDT framework with two major capabilities: 1. MMIO-based access to monitoring and allocation registers, replacing the legacy MSR-based interface. 2. Region-aware RDT for fine-grained control over different tiers of memory (e.g., CXL.mem, DDR). This is described in the Intel RDT Architecture Specification: https://cdrdv2-public.intel.com/789566/356688-intel-rdt-arch-spec.pdf This patch set focuses on the first part: enabling MMIO-based access for Cache Monitoring Technology (CMT), while CAT/MBM/MBA are still using MSR. The platform advertises the MMIO register layout through the ACPI ERDT (Enhanced Resource Director Technology) table, which contains sub-tables describing per-domain register regions for monitoring and allocation. With ERDT, L3 cache occupancy counters are read via MMIO rather than MSR, allowing the reads to be performed from any CPU without requiring cross-CPU IPIs. This series parses the relevant ACPI sub-tables (RMDD, CMRC), prepares the resctrl monitor infrastructure for MMIO-based reads, and adds initial support for reading L3 occupancy via the CMRC interface. kselftest of CMT and L3_CAT has passed with minor adjustment at https://lore.kernel.org/lkml/20260523101715.3964456-1-yu.c.chen@intel.com/. Changes since V1: - Add #include to follow the "include-what-you-use" best practice (Tony Luck) - Fix 3 issues reported by: https://sashiko.dev/#/patchset/cover.1779872016.git.yu.c.chen%40intel.com Remove the variable of cacd in struct erdt_domain_info as it will never be used after initialization. Invoke erdt_exit() to avoid resource leak if rdt_alloc_capable and rdt_mon_capable are both false. Adjust the comments suggested by sashiko. Anil S Keshavamurthy (1): x86/resctrl: Parse ACPI ERDT table and map RMDD domains by L3 cache ID Chen Yu (4): x86/resctrl: Parse ACPI CMRC table x86/resctrl: Rename prev_msr to prev_mon_val x86/resctrl: Refactor the monitor read function x86/resctrl: Add support for L3 occupancy monitoring via RMID MMIO read Tony Luck (1): fs/resctrl: Do not invoke smp_processor_id() in preemptible context arch/x86/Kconfig | 4 +- arch/x86/include/asm/resctrl.h | 4 + arch/x86/kernel/cpu/resctrl/Makefile | 1 + arch/x86/kernel/cpu/resctrl/core.c | 23 +- arch/x86/kernel/cpu/resctrl/erdt.c | 451 +++++++++++++++++++++++++ arch/x86/kernel/cpu/resctrl/internal.h | 11 +- arch/x86/kernel/cpu/resctrl/monitor.c | 64 ++-- fs/resctrl/monitor.c | 38 ++- 8 files changed, 551 insertions(+), 45 deletions(-) create mode 100644 arch/x86/kernel/cpu/resctrl/erdt.c -- 2.25.1