[PATCH v2 RESEND v2 0/5] Add Agilex5 support in SVC driver and FPGA configuration and partial reconfiguration support for Agilex5

[Adrian Ng Ho Yin <adrian.ho.yin.ng@altera.com>]

This series adds support for Agilex5 in the SVC driver and enables FPGA
configuration and partial reconfiguration on Altera Agilex5 SoC.

On Agilex5 the DDR base address starts at 0x8000_0000, which is
outside the addressable range of the SDM. The SMMU is used to remap
DDR-allocated buffers to an IOVA within the SDM-accessible 0-512MB
window. Agilex5 REV B introduced a hardware SDM address remapper,
but it must be bypassed so no additional offset is applied to the
IOVA, keeping the implementation consistent across all Agilex5
revisions.

Patch 1 adds the fpga-mgr child node and fpga-region to the Agilex5 DTSI,
and removes the disabled status from the smmu node to enable it, which is
always required on Agilex5 for the service layer to operate correctly.

Patch 2 adds the SMC call definition for the SDM address remapper
configuration in stratix10-smc.h. This is a standalone header change with
no driver dependency.

Patch 3 fixes a pre-existing list corruption bug in
stratix10_svc_free_memory() where an unmatched free called
list_del(&svc_data_mem), corrupting the list head. It also cleans up
related coding style in svc_pa_to_va(). This fix is split out first so it
can be reviewed and backported independently.

Patch 4 adds all data-structure fields, macros, includes, helper function,
and allocation/free paths required for the DMA coherent mode. This covers
both the foundational types (dma_addr, use_dma_mem, dma_addr_offset,
SVC_SDM_DMA_ADDR_BITS/OFFSET) and the functional DMA allocation/free code,
keeping the structural and functional changes together so each intermediate
commit is bisect-safe.

Patch 5 integrates all of the above into probe: enforces SMMU presence for
intel,agilex5-svc, issues the remapper-bypass SMC, selects the DMA path,
initialises the controller fields, registers a devm cleanup action for
leaked buffers, and guards the error path against a NULL genpool.

---
changelog:
v1 -> v2:
- split original patch into smaller patches for easier review and backporting.
- Fixed the Fixes: tag in patch 3 referencing 5a0793ac66ac
- Replaced of_device_is_compatible() with of_device_id.data + of_device_get_match_data()
- Various commit message improvements
---

Adrian Ng Ho Yin (5):
  arm64: dts: socfpga: agilex5: add FPGA manager and region nodes
  firmware: stratix10-svc: Add SMC call for SDM address remapper
    configuration
  firmware: stratix10-svc: fix list corruption in
    stratix10_svc_free_memory
  firmware: stratix10-svc: add DMA coherent memory allocation for
    SMMU-enabled platforms
  firmware: stratix10-svc: enable Agilex5 SMMU support in probe

 .../arm64/boot/dts/intel/socfpga_agilex5.dtsi |  12 +-
 drivers/firmware/stratix10-svc.c              | 263 ++++++++++++++----
 include/linux/firmware/intel/stratix10-smc.h  |  23 ++
 3 files changed, 250 insertions(+), 48 deletions(-)

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2.49.GIT