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From: Jiaxing Hu <gahing@gahingwoo.com>
To: tomeu@tomeuvizoso.net, heiko@sntech.de, robh@kernel.org,
	krzk+dt@kernel.org, conor+dt@kernel.org, joro@8bytes.org,
	will@kernel.org, robin.murphy@arm.com, ulfh@kernel.org,
	p.zabel@pengutronix.de, ogabbay@kernel.org,
	zhangqing@rock-chips.com
Cc: royalnet026@gmail.com, u.kleine-koenig@baylibre.com,
	chaoyi.chen@rock-chips.com, diederik@cknow-tech.com,
	alchark@flipper.net, dri-devel@lists.freedesktop.org,
	linux-rockchip@lists.infradead.org, iommu@lists.linux.dev,
	linux-pm@vger.kernel.org, devicetree@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org, Jiaxing Hu <gahing@gahingwoo.com>
Subject: [PATCH v9 00/13] accel/rocket: RK3576 NPU (RKNN) enablement
Date: Mon, 24 Aug 2026 23:08:49 +1200	[thread overview]
Message-ID: <cover.1787568658.git.gahing@gahingwoo.com> (raw)

Based on Igor Paunovic's "[PATCH v2] accel/rocket: request the core
clocks by name", as v6 through v8 were.

  https://lore.kernel.org/linux-rockchip/20260729130743.128876-1-royalnet026@gmail.com/

Tested on a Radxa ROCK 4D, on next-20260814.

This adds the RK3576 NPU to accel/rocket, which today supports RK3588
only. The RK3576 carries two cores of the same RKNN block, wired up
differently. Two extra convolution buffer clocks, two power domains per
core, one reset rather than two, no NPU SRAM rail, and a PC_TASK_CON
that packs the task number into sixteen bits rather than twelve.

What changed since v8

A new 3/13, and the rest is answers to the v8 thread.

RK3576 did not recover from a job timeout. The block came back with
MMU_DTE_ADDR complaining and every following inference returned the
output zero point. rocket_reset() called pm_runtime_put_noidle(), which
drops the usage count without starting the idle path, so the core stayed
runtime-active, the power domain never dropped, the BIU reset the domain
cycles on power-on never fired, and the MMU never answered again.

pm_runtime_put_autosuspend() is the whole fix. Measured three runs in one
boot on a ROCK 4D with one variable between them, each forcing a timeout
and then running the same convolution:

  put                after the timeout          the next inference
  put_noidle         runtime-active, rail up    0 of 128, MMU_DTE_ADDR
  put_autosuspend    suspended, rail down       128 of 128, no message
  put_noidle again   runtime-active, rail up    0 of 128, MMU_DTE_ADDR

The third run is there so the failure reads as deterministic rather than
intermittent.

Igor Paunovic ran the differential on RK3588: 45 induced resets across
three cores, with and without 1/13 and 2/13, and the domain dropped every
time with no MMU message on either kernel. That is what scopes this to
RK3576. An earlier draft of 3/13 carried Reported-by on his name and that
was wrong. He called it "your non-recovery" and said he could not
reproduce it, and the put_noidle against put_autosuspend split was mine.
He is on 3/13 for the RK3588 result, which is what he contributed.

2/13 now masks the block before synchronize_irq(). hw_submit() arms
INTERRUPT_MASK on every submit and only the hardirq clears it, so on an
ordinary timeout it is still live and a completion can arrive after the
sync returns. The next submit re-arms it. Igor Paunovic raised this and
wrote the line.

That write is guarded by pm_runtime_get_if_active(), and it needs to be.
It is the first register access rocket_reset() has ever made, and the
function holds no runtime PM reference of its own. The only one in the
window belongs to in_flight_job, and the completion path can have put it
before the timeout worker arrives. drm_sched_stop() sits in between, can
block, and subtracts every pending job's credits, so nothing keeps the
core resumed. A register access with the domain down takes an async
SError on this hardware, which is the failure 6/13 and 8/13 describe from
the power-on side. Igor asked the general form of this on v8, whether
rocket_reset() should hold a reference, and it was deferred because
nothing in the path touched a register. 2/13 is what makes it matter.

His Tested-by on the v8 shape of that patch is deliberately not carried
here, because this is not the patch he tested. 1/13 is unchanged and
keeps his.

11/13 includes <linux/device-id/of.h> rather than
<linux/mod_devicetable.h>, which Uwe Kleine-Koenig asked for. The driver
needed nothing else out of the wider header.

5/13 carries a git note naming the base and the one prerequisite, so the
dependency is in the patch rather than only in this letter, which Rob
Herring's bot asked for. dt_binding_check is clean on all three bindings
the series touches with dtschema 2026.6 and yamllint 1.38.0, and
CHECK_DTBS is clean on all 13 rk3576 and all 48 rk3588 dtbs.

Two things I have left alone and would rather hear about than guess at.
8/13 does three things: it adds the settle delay, renames a macro, and
gives RK3576_PD_NPU a regulator, which also makes every RK3576 board
force that domain off at probe. It may want splitting. And 12/13 gives
each core both NPU domains, which is the description that has been
tested here rather than the topology; if it should be one domain per
core, 5/13's minItems has to change with it.

Nothing else moved. The completion path, the register field layout v7
corrected, and the rail and reset arrangement v8 settled are all
unchanged.

Jiaxing Hu (13):
  accel/rocket: take the completion register writes under job_lock
  accel/rocket: wait for a running IRQ handler before resetting a core
  accel/rocket: let the core suspend after a reset
  accel/rocket: factor the completion tail out of the IRQ handler
  dt-bindings: npu: rockchip: add rockchip,rk3576-rknn-core
  dt-bindings: power: rockchip: allow resets in a power domain node
  dt-bindings: iommu: rockchip: describe the RK3576 NPU MMU
  pmdomain/rockchip: add optional per-domain power-on settle delay
  pmdomain/rockchip: cycle optional power-domain resets on power-on
  accel/rocket: select the per-core clock and reset counts from match
    data
  accel/rocket: add RK3576 NPU (RKNN) support
  arm64: dts: rockchip: rk3576: add NPU (RKNN) nodes
  arm64: dts: rockchip: rk3576-rock-4d: enable NPU

 .../bindings/iommu/rockchip,iommu.yaml        |  28 +++++
 .../npu/rockchip,rk3588-rknn-core.yaml        |  47 ++++++-
 .../power/rockchip,power-controller.yaml      |   8 ++
 .../boot/dts/rockchip/rk3576-rock-4d.dts      |  13 ++
 arch/arm64/boot/dts/rockchip/rk3576.dtsi      |  82 +++++++++++-
 drivers/accel/rocket/rocket_core.c            |  28 ++++-
 drivers/accel/rocket/rocket_core.h            |  11 +-
 drivers/accel/rocket/rocket_device.c          |   7 +-
 drivers/accel/rocket/rocket_drv.c             |  28 ++++-
 drivers/accel/rocket/rocket_drv.h             |   2 +
 drivers/accel/rocket/rocket_job.c             | 119 ++++++++++++++----
 drivers/pmdomain/rockchip/pm-domains.c        |  75 +++++++----
 12 files changed, 385 insertions(+), 63 deletions(-)


base-commit: d589af98928d20eb39b04ecce3eecbe7ec802222
-- 
2.43.0


             reply	other threads:[~2026-08-24 11:09 UTC|newest]

Thread overview: 23+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-08-24 11:08 Jiaxing Hu [this message]
2026-08-24 11:08 ` [PATCH v9 01/13] accel/rocket: take the completion register writes under job_lock Jiaxing Hu
2026-08-24 11:08   ` [PATCH v9 02/13] accel/rocket: wait for a running IRQ handler before resetting a core Jiaxing Hu
2026-08-25 12:31     ` Igor Paunovic
2026-08-25 12:45       ` Igor Paunovic
2026-08-24 11:08   ` [PATCH v9 03/13] accel/rocket: let the core suspend after a reset Jiaxing Hu
2026-08-25 12:32     ` Igor Paunovic
2026-08-25 12:45       ` Igor Paunovic
2026-08-24 11:08   ` [PATCH v9 04/13] accel/rocket: factor the completion tail out of the IRQ handler Jiaxing Hu
2026-08-24 11:08   ` [PATCH v9 05/13] dt-bindings: npu: rockchip: add rockchip,rk3576-rknn-core Jiaxing Hu
2026-08-25 12:32     ` Igor Paunovic
2026-08-24 11:08   ` [PATCH v9 06/13] dt-bindings: power: rockchip: allow resets in a power domain node Jiaxing Hu
2026-08-24 16:24     ` Conor Dooley
2026-08-24 11:08   ` [PATCH v9 07/13] dt-bindings: iommu: rockchip: describe the RK3576 NPU MMU Jiaxing Hu
2026-08-24 16:25     ` Conor Dooley
2026-08-24 11:08   ` [PATCH v9 08/13] pmdomain/rockchip: add optional per-domain power-on settle delay Jiaxing Hu
2026-08-24 11:31     ` Abel Vesa
2026-08-24 11:08   ` [PATCH v9 09/13] pmdomain/rockchip: cycle optional power-domain resets on power-on Jiaxing Hu
2026-08-24 11:30     ` Abel Vesa
2026-08-24 11:08   ` [PATCH v9 10/13] accel/rocket: select the per-core clock and reset counts from match data Jiaxing Hu
2026-08-24 11:09   ` [PATCH v9 11/13] accel/rocket: add RK3576 NPU (RKNN) support Jiaxing Hu
2026-08-24 11:09   ` [PATCH v9 12/13] arm64: dts: rockchip: rk3576: add NPU (RKNN) nodes Jiaxing Hu
2026-08-24 11:09   ` [PATCH v9 13/13] arm64: dts: rockchip: rk3576-rock-4d: enable NPU Jiaxing Hu

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