From: Srinivasa Rao Mandadapu <srivasam@codeaurora.org>
To: Stephen Boyd <swboyd@chromium.org>,
agross@kernel.org, alsa-devel@alsa-project.org,
bgoswami@codeaurora.org, bjorn.andersson@linaro.org,
broonie@kernel.org, devicetree@vger.kernel.org,
judyhsiao@chromium.org, lgirdwood@gmail.com,
linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org,
perex@perex.cz, plai@codeaurora.org, robh+dt@kernel.org,
rohitkr@codeaurora.org, srinivas.kandagatla@linaro.org,
tiwai@suse.com
Cc: Venkata Prasad Potturu <potturu@codeaurora.org>
Subject: Re: [PATCH 1/3] pinctrl: qcom: Update lpass variant independent functions as generic
Date: Wed, 27 Oct 2021 13:12:10 +0530 [thread overview]
Message-ID: <d00db826-5834-be00-d75b-e226e6f751b5@codeaurora.org> (raw)
In-Reply-To: <CAE-0n52Ge_XZr914Ksmq5Myk3FRp7+Sc5P-9jj8wuspKkjXnYw@mail.gmail.com>
On 10/7/2021 11:27 PM, Stephen Boyd wrote:
Thanks for Your Time Stephen!!!
> Quoting Srinivasa Rao Mandadapu (2021-10-07 06:48:37)
>> diff --git a/drivers/pinctrl/qcom/pinctrl-lpass-lpi.c b/drivers/pinctrl/qcom/pinctrl-lpass-lpi.c
>> index 2f19ab4..c0117c5 100644
>> --- a/drivers/pinctrl/qcom/pinctrl-lpass-lpi.c
>> +++ b/drivers/pinctrl/qcom/pinctrl-lpass-lpi.c
>> @@ -124,7 +124,8 @@ static const struct pinctrl_pin_desc sm8250_lpi_pins[] = {
>> PINCTRL_PIN(13, "gpio13"),
>> };
>>
>> -enum sm8250_lpi_functions {
>> +
> Please drop this extra newline so the diff makes sense.
Okay.
>> +enum lpass_lpi_functions {
>> LPI_MUX_dmic1_clk,
>> LPI_MUX_dmic1_data,
>> LPI_MUX_dmic2_clk,
>> @@ -203,7 +204,7 @@ static const struct lpi_pingroup sm8250_groups[] = {
>> LPI_PINGROUP(13, NO_SLEW, dmic3_data, i2s2_data, _, _),
>> };
>>
>> -static const struct lpi_function sm8250_functions[] = {
>> +static const struct lpi_function lpass_functions[] = {
> Why not follow the approach of other qcom pinctrl drivers and make a
> core driver that each SoC uses as a library?
Actually this driver is for lpass LPI pin control purpose. For this only
14 pins are there and mostly fixed for all platforms.
So I feel for now this approach is fine.
>> LPI_FUNCTION(dmic1_clk),
>> LPI_FUNCTION(dmic1_data),
>> LPI_FUNCTION(dmic2_clk),
>> @@ -615,7 +616,7 @@ static int lpi_pinctrl_probe(struct platform_device *pdev)
>> return dev_err_probe(dev, PTR_ERR(pctrl->slew_base),
>> "Slew resource not provided\n");
>>
>> - ret = devm_clk_bulk_get(dev, MAX_LPI_NUM_CLKS, pctrl->clks);
>> + ret = devm_clk_bulk_get_optional(dev, MAX_LPI_NUM_CLKS, pctrl->clks);
> Please mention in the commit text why this is now optional.
Okay. will update commit message accordingly.
>
>> if (ret)
>> return dev_err_probe(dev, ret, "Can't get clocks\n");
>>
--
Qualcomm India Private Limited, on behalf of Qualcomm Innovation Center, Inc.,
is a member of Code Aurora Forum, a Linux Foundation Collaborative Project.
next prev parent reply other threads:[~2021-10-27 7:42 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-10-07 13:48 [PATCH 0/3] Add pin control support for lpass sc7280 Srinivasa Rao Mandadapu
2021-10-07 13:48 ` [PATCH 1/3] pinctrl: qcom: Update lpass variant independent functions as generic Srinivasa Rao Mandadapu
2021-10-07 17:57 ` Stephen Boyd
2021-10-27 7:42 ` Srinivasa Rao Mandadapu [this message]
2021-10-07 13:48 ` [PATCH 2/3] dt-bindings: pinctrl: qcom: Add sc7280 lpass lpi pinctrl compatible Srinivasa Rao Mandadapu
2021-10-07 17:59 ` Stephen Boyd
2021-10-27 7:47 ` Srinivasa Rao Mandadapu
2021-10-28 22:22 ` Stephen Boyd
2021-10-08 2:46 ` Rob Herring
2021-10-07 13:48 ` [PATCH 3/3] pinctrl: qcom: Add SC7280 lpass pin configuration Srinivasa Rao Mandadapu
2021-10-07 17:54 ` Stephen Boyd
2021-10-27 7:48 ` Srinivasa Rao Mandadapu
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