From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752250AbcEMAnE (ORCPT ); Thu, 12 May 2016 20:43:04 -0400 Received: from lucky1.263xmail.com ([211.157.147.131]:58826 "EHLO lucky1.263xmail.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751352AbcEMAnC (ORCPT ); Thu, 12 May 2016 20:43:02 -0400 X-263anti-spam: KSV:0; X-MAIL-GRAY: 1 X-MAIL-DELIVERY: 0 X-KSVirus-check: 0 X-ABS-CHECKED: 4 X-ADDR-CHECKED: 0 X-RL-SENDER: shawn.lin@rock-chips.com X-FST-TO: computersforpeace@gmail.com X-SENDER-IP: 58.22.7.114 X-LOGIN-NAME: shawn.lin@rock-chips.com X-UNIQUE-TAG: X-ATTACHMENT-NUM: 0 X-DNS-TYPE: 0 Subject: Re: [PATCH v2 1/2] ARM64: dts: rockchip: add sdhci/emmc for rk3399 To: Brian Norris , Heiko Stuebner References: <1463092552-60696-1-git-send-email-briannorris@chromium.org> Cc: shawn.lin@rock-chips.com, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, Doug Anderson , Brian Norris From: Shawn Lin Message-ID: Date: Fri, 13 May 2016 08:42:29 +0800 User-Agent: Mozilla/5.0 (Windows NT 6.3; WOW64; rv:45.0) Gecko/20100101 Thunderbird/45.0 MIME-Version: 1.0 In-Reply-To: <1463092552-60696-1-git-send-email-briannorris@chromium.org> Content-Type: text/plain; charset=gbk; format=flowed Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org ÔÚ 2016/5/13 6:35, Brian Norris дµÀ: > Add description for the SDHCI v5.1 eMMC controller on rk3399. Fix it to > 200 MHz, to support all supported timing modes. > > Note that 'rockchip,rk3399-sdhci-5.1' is not documented; we presumably > have a compliant Arasan controller, but let's have a rockchip property > as the canonical backup/precautionary measure. Per Heiko's previous > suggestion, let's not clutter the arasan doc with it. > > Signed-off-by: Brian Norris Except for adding "rockchip,rk3399-sdhci-5.1", it looks nice and keeps consistent with our local kernel-4.4 tree. Reviewed-by: Shawn Lin > --- > v2: > > * improved commit message > * assign eMMC clock to 200 MHz > > arch/arm64/boot/dts/rockchip/rk3399.dtsi | 25 ++++++++++++++++++++++++- > 1 file changed, 24 insertions(+), 1 deletion(-) > > diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi > index 46f325a143b0..9980c2eab4e9 100644 > --- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi > +++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi > @@ -215,6 +215,19 @@ > status = "disabled"; > }; > > + sdhci: sdhci@fe330000 { > + compatible = "rockchip,rk3399-sdhci-5.1", "arasan,sdhci-5.1"; > + reg = <0x0 0xfe330000 0x0 0x10000>; > + interrupts = ; > + clocks = <&cru SCLK_EMMC>, <&cru ACLK_EMMC>; > + clock-names = "clk_xin", "clk_ahb"; > + assigned-clocks = <&cru SCLK_EMMC>; > + assigned-clock-rates = <200000000>; > + phys = <&emmc_phy>; > + phy-names = "phy_arasan"; > + status = "disabled"; > + }; > + > usb_host0_ehci: usb@fe380000 { > compatible = "generic-ehci"; > reg = <0x0 0xfe380000 0x0 0x20000>; > @@ -481,8 +494,18 @@ > }; > > grf: syscon@ff770000 { > - compatible = "rockchip,rk3399-grf", "syscon"; > + compatible = "rockchip,rk3399-grf", "syscon", "simple-mfd"; > reg = <0x0 0xff770000 0x0 0x10000>; > + > + #address-cells = <1>; > + #size-cells = <1>; > + > + emmc_phy: phy@f780 { > + compatible = "rockchip,rk3399-emmc-phy"; > + reg = <0xf780 0x20>; > + #phy-cells = <0>; > + status = "disabled"; > + }; > }; > > watchdog@ff840000 { > -- Best Regards Shawn Lin